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UPD75236GJ データシートの表示(PDF) - NEC => Renesas Technology

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UPD75236GJ
NEC
NEC => Renesas Technology NEC
UPD75236GJ Datasheet PDF : 190 Pages
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µPD75236
Table 2-4 µPD75236 I/O Map (1/5)
Address
Hardware Name (Symbol)
b3
b2
b1
b0
F80H
Stack pointer (SP)
R/W No. of Manipulatable Bits Bit Manipulated
1 Bit 4 Bits 8 Bits Addressing
Remarks
R/W
q
Be sure to write 0 to bit 0.
F82H
Register bank select register (RBS)
R*1
F83H
Memory bank select register (MBS)
F84H
Stack bank select register (SBS) R/W
F85H
F86H
Basic interval timer mode
register (BTM)
Basic interval timer (BT)
W
v
R
q
q
q
q
q
q
mem.bit
*2
5
Be sure to write 0 to
bits 3 and 2.
Only bit 3 is bit-manipula-
table.
F88H
Display mode register (DSPM)
W
F89H
Dimmer select register (DIMS)
W
F8AH
KSF Digit select register
(DIGS)
R/W
v
F90H
Timer pulse generator mode
register (TPGM)
W
v
F94H
Timer pulse generator modulo
R/W
register L (MODL)
F96H
Timer pulse generator modulo
R/W
register H (MODH)
F98H
Watch mode register (WM)
W
q
q
q
v
q
q
q
q
mem.bit
mem.bit
Only bit 3 is bit-
testable.
Only bit 3 is bit-manipu-
latable.
* 1. Can be read/written by the SEL instruction.
2. Individually manipulatable as RBS and MBS by 4-bit manipulation.
Manipulatable as BS by 8-bit manipulation.
23

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