µPD77115, 77115A
Instruc-
tion
Instruction
Name
Mnemonic
Load/
store
Parallel
ro = *dpx_mod
load/storeNotes 1, 2 ro’ =*dpy_mod
ro = *dpx_mod
*dpy_mod = rh
*dpx_mod = rh
ro = *dpy_mod
*dpx_mod = rh
*dpy_mod = rh’
Partial load/
storeNotes 1, 2, 3
dest = *dpx_mod
dest′ = *dpy_mod
dest = *dpx_mod
*dpy_mod = source
*dpx_mod = source
dest = *dpy_mod
*dpx_mod = source
*dpy_mod = source’
Direct
addressing
load/storeNote 4
dest = *addr
*addr = source
Immediate
value index
load/storeNote 5
dest = *dp_imm
*dp_imm = source
Register-
to-register
transfer
Register-to-
register
transferNote 6
dest = rl
rl = source
Immediate
value
setting
Immediate
value setting
rl = imm
(where imm = 0 to 0xFFFF)
dp = imm
(where imm = 0 to 0xFFFF)
dn = imm
(where imm = 0 to 0xFFFF)
dm = imm
(where imm = 1 to 0xFFFF)
Operation
ro ← *dpx, ro’ ← *dpy
Instructions Simultaneously Written
Flag
Imme-
Trino- Bino- Unino- Load/ Trans-
Bran-
Cont-
diate
Loop
OV
mial mial minal store fer
ch
rol
value
√√√
•
ro ← *dpx, *dpy ←rh
*dpx ← rh, ro ← *dpy
*dpx ← rh, *dpy ← rh’
dest ← *dpx,
dest′ ← *dpy
dest ← *dpx,
*dpy ← source
*dpx ← source,
dest ← *dpy
*dpx ← source,
*dpy ← source’
dest ← *addr
*addr ← source
dest ← *dp
*dp ← source
dest ← rl
rl ← source
rl ← imm
•
•
•
å
•
dp ← imm
dn ← imm
dm ← imm
Notes 1. Of the two mnemonics, either one of them or both can be written.
2. After transfer, modification specified by mod is performed.
3. Select any of dest, dest’ = {ro, reh, re, rh, rl}, source, source’ = {re, rh, rl}.
4. Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl}, addr = 0: X-0xFFF : X (X memory) .
0: Y-0xFFFF: Y (Y memory)
5. Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl}.
6. Select any register other than general-purpose registers as dest and source.
30
Data Sheet U14867EJ5V0DS