VSC8169 データシートの表示（PDF） - Vitesse Semiconductor
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VSC8169 Datasheet PDF : 18 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
OC-48 (FEC) 16:1 SONET/SDH
MUX with Clock Generator
Preliminary Data Sheet
VSC8169
Package Information
128-Pin PQFP Package Drawing
PIN 128
PIN 1
RAD. 2.92 ± .50
(2)
EXPOSED
INTRUSION
0.127 MAX.
EXPOSED
HEATSINK
2.54 ± .50
PIN 38
D1
D
TOP VIEW
10° TYP.
PIN 102
E1 E
PIN 64
Key mm Tolerance
A
2.35
MAX
A1
0.25
MAX
A2
2.00
+.10
D
17.20
±.20
D1 14.00
±.10
E
23.20
±.20
E1 20.00
±.10
L
.88
+.15/-.10
e
.50
BASIC
b
.22
±.05
θ
0°-7°
R
.30
TYP
R1
.20
TYP
A2
A1
10° TYP.
R
A
e
Notes: 1)
2)
3)
Drawing is not to scale
All dimensions in mm
Package represented is
also used for the 64,
80, & 100 PQFP packages.
Pin count drawn does
not reflect the 128 Package.
R1
θ1
A .25
θ
0.17 MAX.
L
STANDOFF
A1
b
LEAD COPLANARITY
NOTES:
Package #: 101-322-5
Issue #: 2
Page 16
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52230-0, Rev 3.6
01/02/01
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