W3020 データシートの表示（PDF） - Agere -> LSI Corporation

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W3020

GSM Multiband RF Transceiver

Agere -> LSI Corporation 

Advance Data Sheet

December 1999

W3020 GSM Multiband RF Transceiver

Programming Information (continued)

TR Register

The TR register is the transmit/receive register for W3020. It contains bits for setting various transmit and

receive modes, setting receive gain, etc. It is expected that this register would be written several times during a

frame.

Last bit in serial sequence

First bit in serial sequence

Bit No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Bit A0=0 A1=0 G0 G1 G2 G3 G4 G5 G6 T0 T1 T2 DS DP FTR T3 T4 T5 T6 MO1 MO2 MO3 B A2=1

Table 13. TR Register

Bit Number Bit

24

A2

23

B

22

MO3

21

MO2

20

MO1

19

T6

18

T5

17

T4

16

T3

15

FTR

14

DP

13

DS

12

T2

11

T1

10

T0

9

G6

8

G5

7

G4

6

G3

5

G2

4

G1

3

G0

2

A1

1

A0

SC1 Standard

Setting

1

0

—

Function

Address Bit

Band Select (See Table 14.)

RX, TX, Synthesizer Mode (See Table 15.)

0

Disable LO2 Circuitry in All Modes (See Table 16.)

0

Disable LO1 Circuitry (W3000 excluded) (See Table 17.)

0

RX IF Duty Cycle Corrector Disable (See Table 18.)

0

GSM1800 TX IF LO Divide-by-3 Duty Cycle Corrector Disable (See

Table 19.)

1

LPF Tune Filter Request (See Table 20.)

0

dc Precharge Only (See Table 21.)

0

dc Correction Skip (See Table 22.)

0

LO2 Divide by 2 or Divide-by-3 Select for TX IF (See Table 23.)

0

TX IF LO Divide-by-6 Select (See Table 24.)

0

TX IF Duty-Cycle Corrector Disable (See Table 25.)

—

Digital Gain Control RX IF/IQ-Baseband (See Table 26.)

1

Digital Gain Control LNA On/Off (See Table 26.)

0

Address Bits

0

Note: The TR register is reset to an all-zero state after the reset bit in the CONFIG register has been set high.

Lucent Technologies Inc.

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