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W921E400 データシートの表示(PDF) - Winbond

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W921E400
Winbond
Winbond Winbond
W921E400 Datasheet PDF : 53 Pages
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W921E400A/W921C400
P2:
P2TP register: (address = 00DH, default data = 0H)
b3
b2
b1
b0
Reserved
Reserved
Reserved
0: P2 (2 pins) work as CMOS type
1: P2 (2 pins) work as open-drain type
6.6 Serial Port
The W921E400A/W921C400 has a clock-synchronous serial interface which transmits and receives
8-bit data as default. User can program the P6IO register to select port P6 as the serial port.
The serial transmitter/receiver function can be operated with multi-nibble function and the LSB of
every nibble is transmitted/received first.
The serial transmitted/received data are come from or are stored into the serial buffer registers
(address 050H to 14EH); how many nibbles will be transmitted/received is decided by the serial MSB
nibble register (SRMNR, address = 0AH) and serial LSB nibble register (SRLNR, address = 09H).
SRMNR REG: (ADDRESS = 00AH, default data = 0H)
b3
b2
b1
b0
SRLNR REG: (ADDRESS = 009H, default data = 2H)
b3
b2
b1
b0
The transceiver data will be latched on the rising or falling edge of the clock; this is determined by the
serial clock inverter control register (SRINV, address = 00CH). Before SOP or SIP instruction is
executed the SRINV register must be set to the exact value. Once the bit3 and bit2 of SRINV register
are both cleared to zero, the serial transceiver function will be reset to initial status immediately.
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