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ICX284AK データシートの表示(PDF) - Sony Semiconductor

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ICX284AK Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Block Diagram and Pin Configuration
(Top View)
ICX284AK
8
7
6
5
4
3
2
1
Ye
Cy
Ye
G
Mg
G
Ye
Cy
Ye
G
Mg
G
Ye
Cy
Ye
G
Mg
G
Horizontal register
Cy
Mg
Cy
Mg
Cy
Mg Note)
Note)
9 10 11 12 13 14 15 16
: Photo sensor
Pin Description
Pin No. Symbol
Description
Pin No. Symbol
Description
1
Vφ4
Vertical register transfer clock
9
VDD
Supply voltage
2
Vφ3A
Vertical register transfer clock
10 GND GND
3
Vφ3B
Vertical register transfer clock
4
Vφ2
Vertical register transfer clock
11 φSUB Substrate clock
12
CSUB
Substrate bias1
5
Vφ1A
Vertical register transfer clock
13 VL
Protective transistor bias
6
Vφ1B
Vertical register transfer clock
14 φRG Reset gate clock
7 GND GND
15 Hφ1
Horizontal register transfer clock
8
VOUT
Signal output
16 Hφ2
Horizontal register transfer clock
1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance
of 0.1µF.
–2–

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