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HSP50016 データシートの表示(PDF) - Intersil

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HSP50016
Intersil
Intersil Intersil
HSP50016 Datasheet PDF : 31 Pages
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HSP50016
TABLE 8. HDF/OUTPUT REGISTER (Continued)
DESTINATION ADDRESS = 5
BIT
POSITION
FUNCTION
DESCRIPTION
2-1
Number Of Output Bits 00 = 16 Bits
01 = 24 Bits
10 = 32 Bits
11 = 38 Bits
0
Output Sense
0 = LSB First
1 = MSB First
BIT
POSITION
FUNCTION
39-37
Address
36
Update
35
I followed by Q
34-29
Time Slot Number
28
IQCLK
Polarity
27
26
25-24
23
22
21-20
19
18-17
IQCLK Duty Cycle
IQCLK
Duration
IQCLK Three-State
Control
IQSTB
Polarity
IQSTB
Location
IQSTB Three-State
Control
I Polarity
I Three-State Control
16
Q Polarity
TABLE 9. INPUT AND OUTPUT FORMAT REGISTER
DESTINATION ADDRESS = 6
DESCRIPTION
110 = Control Word 6
0 = Update Only This Control Register
1 = Update All Control Registers
0 = I and Q Output Separately
1 = I and Q Data Output on I Pin
Bits 34-29 = 25...20. Range: 0 < Time Slot Number < 63.
This implies that 64 different channels may be mutliplexed, assigning one time slot per channel.
0 = Output Data Stable On Rising Edge Of IQCLK; IQCLK High between I or Q Bit Periods when IQCLK
Duration = 0.
1 = Output Data Stable on Falling Edge of IQCLK; IQCLK Low between I or Q Bit Periods when IQCLK
Duration = 0.
0 = IQCLK Active Time = CLK Period.
1 = 50% Duty Cycle
0 = Active During I or Q Output Periods Only
1 = Active Continuously
00 = Three-State IQCLK
01 = Enable IQCLK
1x = Auto-Three-State Enable IQCLK (during time slot)
0 = Active High
1 = Active Low
0 = IQSTB Prior to the Beginning of the Data Word.
1 = IQSTB During the Data Word.
00 = Three-State IQSTB
01 = Enable IQSTB
1x = Auto Three-State Enable IQSTB (during time slot)
0 = True Data
1 = Inverted Data
00 = Three-State I
01 = Enable I
1x = Auto Three-State Enable I (during time slot)
0 = True Data
1 = Inverted Data
3-216

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