AD10265 データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD10265
Analog Devices
AD10265 Datasheet PDF : 24 Pages
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AD10265
Parameter
Temp
Test
Level
Mil
Subgroup
AD10265AZ
Min
Typ
Max
Unit
SPURIOUS-FREE DYNAMIC RANGE9
Analog Input @ 1.24 MHz
25°C
I
4
Full
II
5, 6
@ 17 MHz
25°C
I
4
Full
II
5, 6
@ 32 MHz
25°C
V
Full
V
75
80
74
80
71
80
70
79
79
79
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
TWO-TONE IMD REJECTION10
f1, f2 @ –7 dBFS
Full
V
4, 5, 6
66
77
dBc
OBSOLETE CHANNEL-TO-CHANNEL ISOLATION11
LINEARITY
Differential Nonlinearity
(Encode = 20 MHz)
Integral Nonlinearity
(Encode = 20 MHz)
DIGITAL OUTPUTS
Logic Compatibility
Logic “1” Voltage
Logic “0” Voltage
Output Coding
POWER SUPPLY
AVCC Supply Voltage
I (AVCC) Current
AVEE Supply Voltage
I (AVEE) Current
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
IV
12
IV
12
V
I
1, 2, 3
I
1, 2, 3
V
V
V
V
80
dB
–1.0
± 0.5
+1.5 LSB
± 1.25
LSB
CMOS
2.8
DVCC – 0.2
V
0.2
0.5
V
Two’s Complement
+5.0
V
336
mA
–5.0
V
66
mA
DVCC Supply Voltage
Full
V
+3.3
V
I (DVCC) Current
ICC (Total) Supply Current
Power Dissipation (Total)
Full
V
Full
I
1, 2, 3
Full
I
1, 2, 3
20
mA
422
520 mA
2.1
2.4
W
Power Supply Rejection Ratio (PSRR)
Full
IV
12
0.01
0.02 % FSR/% VS
NOTES
1Gain tests are performed on AIN1 over specified input voltage range.
2Input capacitance specifications show only ceramic package capacitance.
3Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor.
5ENCODE may also be driven differentially in conjunction with ENCODE; see “Encoding the AD10265” for details.
6Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first 5 harmonics removed). Encode = 65 MSPS.
8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS.
9Analog Input signal equal –1 dBFS; SFDR is ratio of converter full scale to worst spur.
10Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. f1 = 17.0 MHz
± 100 kHz, f2 = 18.0 MHz ± 100 kHz.
11Channel-to-channel isolation tested with A channel/50 ohm terminated <AIN2 grounded, and a full-scale signal applied to B channel (AIN1).
All specifications guaranteed within 100 ms of initial power-up, regardless of sequencing.
Specifications subject to change without notice.
REV. A
–3–
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