CS51033YD8 データシートの表示（PDF） - Cherry semiconductor
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CS51033YD8 Datasheet PDF : 8 Pages
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Applications Information: continued
VOUT
D = VIN
From this, the maximum duty cycle DMAX is 53%, this
occurs when VIN is at its minimum while the minimum
duty cycle DMIN is 0.35%.
2) Switching Frequency and on and off time calculations.
FSW= 200KHz. The switching frequency is determined by
COSC, whose value is determined by :
COSC =
( ( ) ( ) ) Fsw×
95
1- FSW - 30 × 10 3 2
3 × 10 6
FSW
≅ 470pF
T = 1 = 5µs
FSW
to 50mV peak to peak is:
∆V 50 × 10-3
ESR = ∆I = 0.6A = 55mΩ
The output capacitor should be chosen so that its ESR is at
least half of the calculated value and the capacitance is at
least ten times the calculated value. It is often advisable to
use several capacitors in parallel to reduce the ESR.
Low impedance aluminum electrolytic, tantalum or organic
semiconductor capacitors are a good choice for an output
capacitor. Low impedance aluminum are the cheapest but
are not available in surface mount at present. Solid tantalum
chip capacitors are available from a number of suppliers
and offer the best choice for surface mount applications. The
capacitor working voltage should be greater than the output
voltage in all cases.
5) VFB Divider
( ) ( ) VOUT = 1.25V
R1 + R2
R2
= 1.25V
R1
R2
+1
TON(MAX) = 5µs × 0.53 = 2.65µs
TON(MIN) = 5µs × 0.35 = 1.75µs
TOFF(MAX) = 5µs − 0.7µs = 4.3µs
3) Inductor selection
Pick the inductor value to maintain continuous mode opera-
tion down to 0.3 Amps.
The ripple current ∆I = 2 × IOUT(MIN) = 2 × 0.3A = 0.6A.
The input bias current to the comparator is 4µA. The resistor
divider current should be considerably higher than this to
ensure that there is sufficient bias current. If we choose the
divider current to be at least 250 times the bias current this
gives a divider current of 1mA and simplifies the calcula-
tions.
1.5V = R1+R2 = 1.5KΩ
1mA
Let R2 = 1K
VOUT + VD × ΤOFF(MAX)
LMIN =
∆I
= 2.1V × 4.3µs ≅ 15µH
0.6A
Rearranging the divider equation gives:
( ) ( ) R1 = R2 VOUT -1 = 1KΩ 1.5V = 200Ω
1.25
1.25
The CS51033 will operate with almost any value of inductor.
With larger inductors the ripple current is reduced and the
regulator will remain in a continuous conduction mode for
lower values of load current. A smaller inductor will result
in larger ripple current. The core must not saturate with the
maximum expected current, here given by:
IMAX =
IOUT + ∆I
2
= 3A + 0.6A/2 = 3.3A
4) Output Capacitor
The output capacitor limits the output ripple voltage. The
CS51033 needs a maximum of 15mV of output ripple for the
feedback comparator to change state. If we assume that all
the inductor ripple current flows through the output capaci-
tor and that it is an ideal capacitor (i.e. zero ESR), the mini-
mum capacitance needed to limit the output ripple to 50mV
peak to peak is given by:
∆I
0.6A
CO = 8 × FSW × ∆V = 8 × (200 × 103 Hz) × (33 × 10-3V) ≅ 11.4µF
The minimum ESR needed to limit the output voltage ripple
6) Divider bypass capacitor Crr
Since the feedback resistors divide the output voltage by a
factor of 4, i.e. 5V/1.25V= 4 it follows that the output ripple
is also divided by four. This would require that the output
ripple be at least 60mV (4 × 15mV) to trip the feedback com-
pactor. We use a capacitor Crr to act as an ac short so that
the output ripple is not attenuated by the divider network.
The ripple voltage frequency is equal to the switching fre-
quency so we choose Crr so that:
XC =
1
2πfC
is negligible at the switching frequency.
In this case FSW is 200kHz if we allow XC = 3Ω then:
C=
1
2πf3
≅ 0.265µF
7) Soft start and Fault timing capacitor CS.
CS performs several important functions. First it provides a
dead time for load transients so that the IC does not enter a
fault mode every time the load changes abruptly. Secondly
it disables the fault circuitry during startup, it also provides
soft start by clamping the reference voltage during startup
6
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