CY62146EV30 データシートの表示（PDF） - Cypress Semiconductor

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CY62146EV30

4-Mbit (256 K × 16) Static RAM

Cypress Semiconductor 

CY62146EV30 MoBL®

Data Retention Characteristics

Over the Operating Range

Parameter

Description

Conditions

Min

VDR

ICCDR [11]

tCDR [12]

tR [13]

VCC for data retention

1.5

Data retention current

VCC = 1.5 V,

Industrial /

–

CE > VCC – 0.2 V, Automotive-A

VIN > VCC – 0.2 V or

VIN < 0.2 V

Chip deselect to data retention –

0

time

Operation recovery time

–

45

Typ [10]

–

0.8

–

–

Max Unit

–

V

7

A

–

ns

–

ns

Data Retention Waveform

VCC

CE

Figure 4. Data Retention Waveform

VCC(min)

tCDR

DATA RETENTION MODE

VDR > 1.5 V

VCC(min)

tR

Notes

10. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.

11. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB1/ ISB2 / ICCDR spec. Other inputs can be left floating.

12. Tested initially and after any design or process changes that may affect these parameters.

13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.

Document Number: 38-05567 Rev. *H

Page 6 of 18

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