M34280M1-XXXFP データシートの表示（PDF） - Renesas Electronics

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M34280M1-XXXFP

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS

Renesas Electronics 

MITSUBISHI MICROCOMPUTERS

4280 Group

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS

MACHINE INSTRUCTIONS (CONTINUED)

Parameter

Instruction code

Mnemonic

Hexadecimal

Type of

instructions

D8 D7 D6 D5 D4 D3 D2 D1 D0 notation

CLD

0 0 0 0 1 0 0 0 1 011 1

1 (D) ← 0

RD

0 0 0 0 1 0 1 0 0 0 1 4 1 1 (D(Y)) ← 0

(Y) = 0 to 7

Function

SD

0 0 0 0 1 0 1 0 1 0 1 5 1 1 (D(Y)) ← 1

(Y) = 0 to 7

SZD

000100100

000101011

024 2

02B

2 (D(Y)) = 0 ?

(Y) = 7

OEA

0 1 0 0 0 0 1 0 0 0 8 4 1 1 (E1, E0) ← (A1, A0)

IAE

0 0 1 0 1 0 1 1 0 0 5 6 1 1 (A2–A0) ← (E2–E0)

OGA

0 1 0 0 0 0 0 0 0 0 8 0 1 1 (G) ← (A)

IAG

NOP

0 0 0 1 0 1 0 0 0 0 2 8 1 1 (A) ← (G)

0 0 0 0 0 0 0 0 0 0 0 0 1 1 (PC) ← (PC) + 1

POF

0 0 0 0 0 1 1 0 1 0 0 D 1 1 RAM back-up

SNZP

0 0 0 0 0 0 0 1 1 0 0 3 1 1 (P) = 1 ?

CCK

0 0 1 0 1 1 0 0 1 0 5 9 1 1 STCK changes to f(XIN)

TLOA

0 0 1 0 1 1 0 0 0 0 5 8 1 1 (LO1, LO0) ← (A1, A0)

URSC 0 1 0 0 0 0 0 1 0 0 8 2 1 1 (URS) ← 1

TPU0A 0 1 0 0 0 1 1 1 1 0 8 F 1 1 (PU02–PU00) ← (A2–A0)

WRST 0 0 0 0 0 1 1 1 1 0 0 F 1 1 (WDF1) ← 0

MITSUBISHI MICROCOMPUTERS

4280 Group

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS

Skip condition

Detailed description

–

– Clears (0) to port D (high-impedance state).

–

– Clears (0) to a bit of port D specified by register Y (high-impedance state).

–

– Sets (1) to a bit of port D specified by register Y.

(D(Y)) = 0

(Y) = 7

– Skips the next instruction when a bit of port D specified by register Y is “0.”

–

– Outputs the contents of register A to port E.

–

– Transfers the contents of port E to register A.

–

– Outputs the contents of register A to port G.

–

– Transfers the contents of port G to register A.

–

– No operation

–

– Puts the system in RAM back-up state.

(P) = 1

–

–

–

–

–

– Skips the next instruction when P flag is “1.”

After skipping, P flag remains unchanged.

– System clock (STCK) changes to f(XIN) from f(XIN)/8. Execute this CCK instruction at address 0 in page

0.

– Transfers the contents of register A to the logic operation selection register LO.

– Sets the most significant ROM code reference enable flag (URS) to “1.”

– Transfers the contents of register A to register PU0.

– Initializes the watchdog timer flag (WDF1).

34

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