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M66282FP データシートの表示(PDF) - Renesas Electronics

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M66282FP
Renesas
Renesas Electronics Renesas
M66282FP Datasheet PDF : 14 Pages
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M66282FP
n-bit Delay 2
(Slides input timings of WRESB and RRESB at cycles according to the delay length)
WCK
RCK
0 cycle 1 cycle 2 cycle n 2 cycle n 1 cycle n cycle n + 1 cycle n + 2 cycle n + 3 cycle
tRESS tRESH
WRESB
tRESS tRESH
RRESB
tDS tDH
tDS tDH
Dn
(0)
(1)
(2)
(n 2)
(n 1)
(n)
(n +1)
(n +2)
(n +3)
m cycle
tAC
tOH
Qn
(0)
(1)
(2)
(3)
WEB, REB = "L"
m3
n-bit Delay 3
(Slides address by disabling REB in the period according to the delay length)
WCK
RCK
0 cycle 1 cycle 2 cycle
tRESS tRESH
WRESB
RRESB
REB
Dn
Qn
tDS tDH
(0)
HIGH-Z
(1)
(2)
m cycle
n 1 cycle n cycle n + 1 cycle n + 2 cycle n + 3 cycle
tNREH tRES
tDS tDH
(n 2)
(n 1)
(n)
(n + 1)
(n + 2)
(n + 3)
tAC
tOH
(0)
(1)
(2)
(3)
WEB = "L"
m3
REJ03F0255-0200 Rev.2.00 Sep 14, 2007
Page 10 of 13

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