PA9543A(2009) データシートの表示（PDF） - NXP Semiconductors.

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PA9543A
(Rev.:2009)

2-channel I2C-bus switch with interrupt logic and reset

NXP Semiconductors. 

NXP Semiconductors

PCA9543A/43B/43C

2-channel I2C-bus switch with interrupt logic and reset

7.5 Bus transactions

Data is transmitted to the PCA9543A control register using the Write mode as shown in

Figure 13.

slave address

control register

SDA S 1 1 1 0 0 A1 A0 0 A X X X X X X B1 B0 A P

START condition

R/W acknowledge

from slave

acknowledge

from slave

STOP condition

002aab182

Fig 13. Write control register

Data is read from PCA9543A using the Read mode as shown in Figure 14.

slave address

control register

last byte

SDA S 1 1 1 0 0 A1 A0 1 A X X INT1 INT0 X X B1 B0 NA P

START condition

Fig 14. Read control register

R/W acknowledge

from slave

no acknowledge

from master

STOP condition

002aab183

PCA9543A_43B_43C_6

Product data sheet

Rev. 06 — 15 June 2009

© NXP B.V. 2009. All rights reserved.

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