PCF8594C-2T データシートの表示（PDF） - Integrated Circuit Systems

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PCF8594C-2T

256 to 1024×8-bit CMOS EEPROMs with I2C-bus interface

Integrated Circuit Systems 

Philips Semiconductors

256 to 1024 × 8-bit CMOS EEPROMs with

I2C-bus interface

handbook, full pagewidth

PTC

SDA

SCL

td t r t HIGH t f t LOW

1

2

STOP

Fig.13 Page mode.

Product specification

PCF85xxC-2 family

1153

MBA699

handbook, full pagewidthSLAVE ADDRESS WORD ADDRESS

I2C-bus S

0A

A

DATA

A

DATA

A P (1)

HIGH

PTC

LOW

undefined

negative edge

SCL 8-bit

12

12

12

td 0

257

513

1153

undefined

clock (2)

clock (3)

clock (4)

MBA700

(1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW after transmission of the eighth bits of the word

address (negative edge of SCL). Thus the state of pin 7 may be previously undefined. Leaving pin 7 LOW causes a higher standby current.

(2) 1-byte programming.

(3) 2-byte programming.

(4) One page (8 bytes) programming.

Fig.14 External clock.

1997 Feb 13

15

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