CXD2930BR データシートの表示（PDF） - Sony Semiconductor

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CXD2930BR

GPS LSI with Built-in 32-bit RISC CPU

Sony Semiconductor 

External Data Access Timing (XCS0, DCS0 to 5, with data wait)

(1) Read (byte access, with data wait)

CLKOUT

DADR

XCS0, DCS0 to 5

DRD

DB

(8)

(2) Write (byte access, with data wait)

CLKOUT

DADR

XCS0, DCS0 to 5

DWR

DB

(8)

(3) Read (half-word access, with data wait)

CLKOUT

DADR

XCS0, DCS0 to 5

DRD

DB

H (8)

(4) Write (half-word access, with data wait)

CLKOUT

DADR

XCS0, DCS0 to 5

DWR

DB

L (8)

– 21 –

L (8)

H (8)

CXD2930BR

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