M58CR032D データシートの表示（PDF） - STMicroelectronics
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M58CR032D Datasheet PDF : 63 Pages
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M58CR032C, M58CR032D
Offset
(P+9)h = 42h
(P+A)h = 43h
(P+B)h
(P+C)h = 45h
(P+D)h = 46h
(P+E)h = 47h
(P+F)h
(P+10)h
(P+11)h
(P+12)h
Data
0001h
0003h
0000h
0018h
00C0h
0000h
Description
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query
bit 0
Program supported after Erase Suspend (1 = Yes, 0 = No)
bit 7 to 1 Reserved; undefined bits are ‘0’
Block Protect Status
Defines which bits in the Block Status Register section of the Query are
implemented.
bit 0 Block protect Status Register Lock/Unlock
bit active
(1 = Yes, 0 = No)
bit 1 Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No)
bit 15 to 2 Reserved for future use; undefined bits are ‘0’
VDD Logic Supply Optimum Program/Erase voltage (highest performance)
bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100 mV
VPP Supply Optimum Program/Erase voltage
bit 7 to 4
bit 3 to 0
Reserved
HEX value in volts
BCD value in 100 mV
Value
Yes
Yes
Yes
1.8V
12V
Table 34. Burst Read Information
Offset
Data
Description
(P+13)h = 4Ch
0003h
Page-mode read capability
bits 0-7
’n’ such that 2n HEX value represents the number of read-
page Bytes. See offset 28h for device word width to
determine page-mode data output width.
(P+14)h = 4Dh 0003h Number of synchronous mode read configuration fields that follow.
(P+15)h = 4Eh
0001h
Synchronous mode read capability configuration 1
bit 3-7
Reserved
bit 0-2
’n’ such that 2n+1 HEX value represents the maximum
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear
bursts that will output data until the internal burst counter
reaches the end of the device’s burstable address space.
This field’s 3-bit value can be written directly to the read
configuration register bit 0-2 if the device is configured for its
maximum word width. See offset 28h for word width to
determine the burst data output width.
(P+16)h = 4Fh 0002h Synchronous mode read capability configuration 2
(P+17)h = 50h 0007h Synchronous mode read capability configuration 3
(P+18)h = 51h 0036h Max operating clock frequency (MHz)
Value
8 Byte
3
4
8
Cont.
54 MHz
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