M50LPW041N データシートの表示（PDF） - STMicroelectronics

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M50LPW041N

4 Mbit (512Kb x8, Uniform Block) 3V Supply Low Pin Count Flash Memory

STMicroelectronics 

M50LPW041

Table 13. Program and Erase Times

(TA = 0 to 70°C; VCC = 3.0 to 3.6V)

Parameter

Interface Test Condition

Byte Program

Quadruple Byte Program

Chip Erase

A/A Mux

A/A Mux

VPP = 12V ± 5%

VPP = 12V ± 5%

Block Program

Block Erase

Program/Erase Suspend to Program pause (3)

A/A Mux

VPP = 12V ± 5%

VPP < 12V – 5%

VPP = 12V ± 5%

VPP < 12V – 5%

Program/Erase Suspend to Block Erase pause (3)

Note: 1. TA = 25°C, VCC = 3.3V

2. This time is obtained executing the Quadruple Byte Program Command.

3. Sampled only, not 100% tested.

Min Typ (1) Max Unit

10

200 µs

10

200 µs

5

sec

0.1 (2)

5

sec

0.4

5

sec

0.75

8

sec

1

10 sec

5

µs

30

µs

‘0’, the Program/Erase Controller is active; when

the bit is ‘1’, the Program/Erase Controller is inac-

tive.

The Program/Erase Controller Status is ‘0’ imme-

diately after a Program/Erase Suspend command

is issued until the Program/Erase Controller paus-

es. After the Program/Erase Controller pauses the

bit is ‘1’.

During Program and Erase operation the Pro-

gram/Erase Controller Status bit can be polled to

find the end of the operation. The other bits in the

Status Register should not be tested until the Pro-

gram/Erase Controller completes the operation

and the bit is ‘1’.

After the Program/Erase Controller completes its

operation the Erase Status, Program Status and

Block Protection Status bits should be tested for

errors.

Erase Suspend Status (Bit 6). The Erase Sus-

pend Status bit indicates that a Block Erase oper-

ation has been suspended and is waiting to be

resumed. The Erase Suspend Status should only

be considered valid when the Program/Erase

Controller Status bit is ‘1’ (Program/Erase Control-

ler inactive); after a Program/Erase Suspend com-

mand is issued the memory may still complete the

operation rather than entering the Suspend mode.

When the Erase Suspend Status bit is ‘0’ the Pro-

gram/Erase Controller is active or has completed

its operation; when the bit is ‘1’ a Program/Erase

Suspend command has been issued and the

memory is waiting for a Program/Erase Resume

command.

14/37

When a Program/Erase Resume command is is-

sued the Erase Suspend Status bit returns to ‘0’.

Erase Status (Bit 5). The Erase Status bit can be

used to identify if the memory has applied the

maximum number of erase pulses to the block(s)

and still failed to verify that the block(s) has erased

correctly. The Erase Status bit should be read

once the Program/Erase Controller Status bit is ‘1’

(Program/Erase Controller inactive).

When the Erase Status bit is ‘0’ the memory has

successfully verified that the block(s) has erased

correctly; when the Erase Status bit is ‘1’ the Pro-

gram/Erase Controller has applied the maximum

number of pulses to the block(s) and still failed to

verify that the block(s) has erased correctly.

Once the Erase Status bit is set to ‘1’ it can only be

reset to ‘0’ by a Clear Status Register command or

a hardware reset. If it is set to ‘1’ it should be reset

before a new Program or Erase command is is-

sued, otherwise the new command will appear to

fail.

Program Status (Bit 4). The Program Status bit

can be used to identify if the memory has applied

the maximum number of program pulses to the

byte and still failed to verify that the byte has pro-

grammed correctly. The Program Status bit should

be read once the Program/Erase Controller Status

bit is ‘1’ (Program/Erase Controller inactive).

When the Program Status bit is ‘0’ the memory has

successfully verified that the byte has pro-

grammed correctly; when the Program Status bit is

‘1’ the Program/Erase Controller has applied the

maximum number of pulses to the byte and still

failed to verify that the byte has programmed cor-

rectly.

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