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IDT71V321L(2001) データシートの表示(PDF) - Integrated Device Technology

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IDT71V321L
(Rev.:2001)
IDT
Integrated Device Technology IDT
IDT71V321L Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT71V321/71V421S/L
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts
AC Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
Output Load
Figures 1 and 2
3026 tbl 08
Industrial and Commercial Temperature Ranges
Data Retention Waveform
DATA RETENTION MODE
VCC
3.0V
VDR 2.0V
3.0V
tCDR
tR
CE
VDR
VIH
VIH
,
3026 drw 04
DATAOUT
BUSY
INT 435
3.3V
590
30pF
DATAOUT
435
3.3V
590
5pF
Figure 1. AC Output Test Load
3026 drw 05
Figure 2. Output Test Load
(for tHZ, tLZ, tWZ, and tOW)
* Including scope and jig.
AC Electrical Characteristics Over the
Operating Temperature Supply Voltage Range(2)
71V321X25
71V421X25
Com 'l
& Ind
S ym b ol
Param eter
Min.
M ax.
READ CYCLE
tRC
Read Cycle Time
25
____
tAA
Address Access Time
____
25
tACE
Chip Enable Access Time
____
25
tAOE
Output Enable Access Time
____
12
tOH
Output Hold from Address Change
3
____
tLZ
Output Low-Z Time(1,2)
0
____
tHZ
Output High-Z Time(1,2)
____
12
tPU
Chip Enable to Power Up Time (2)
0
____
tPD
Chip Disable to Power Down Time(2)
____
50
71V321X35
71V421X35
Com 'l Only
Min.
M ax.
35
____
____
35
____
35
____
20
3
____
0
____
____
15
0
____
____
50
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. 'X' in part numbers indicates power rating (S or L).
71V321X55
71V421X55
Com 'l Only
Min.
Max. Unit
55
____
ns
____
55
ns
____
55
ns
____
25
ns
3
____
ns
0
____
ns
____
30
ns
0
____
ns
____
50
ns
3026 tbl 09
6.542

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