MAX9673 データシートの表示（PDF） - Maxim Integrated

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MAX9673

10-Bit, Programmable Gamma Reference Systems with MTP for TFT LCDs

Maxim Integrated 

10-Bit, Programmable Gamma Reference

Systems with MTP for TFT LCDs

ACKNOWLEDGE FROM

MAX9672/MAX9673/MAX9674

ACKNOWLEDGE FROM

MAX9672/MAX9673/MAX9674

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

W1 W0 X X X X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

S

SLAVE ADDRESS

0 A 0 0 REGISTER ADDRESS A

DATA BYTE 1

A

DATA BYTE 2

AP

R/W

M1 M0

1 WORD

AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER

Figure 4. Writing a Word of Data to the MAX9672/MAX9673/MAX9674

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

ACKNOWLEDGE FROM

MAX9672/MAX9673/MAX9674

ACKNOWLEDGE FROM

MAX9672/MAX9673/MAX9674

W1 W0 X X X X D9 D8

D7 D6 D5 D4 D3 D2 D1 D0

S

SLAVE ADDRESS

0 A 0 0 REGISTER ADDRESS A

DATA BYTE 1

A

DATA BYTE 2

A

R/W

M1 M0

1 WORD

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

W1 W0 X X X X D9 D8

AUTOINCREMENT INTERNAL

REGISTER ADDRESS POINTER

ACKNOWLEDGE FROM MAX9672/

MAX9673/MAX9674

D7 D6 D5 D4 D3 D2 D1 D0

DATA BYTE n-1

A

1 WORD

DATA BYTE n

AP

Figure 5. Writing n Bytes of Data to the MAX9672/MAX9673/MAX9674

a receiving device is busy or if a system fault has

occurred. In the event of an unsuccessful data transfer,

the bus master may retry communication. The master

pulls down SDA during the ninth clock cycle to

acknowledge receipt of data when the MAX9672/

MAX9673/MAX9674 are in read mode. An acknowledge

is sent by the master after each read byte to allow data

transfer to continue. A not acknowledge is sent when

the master reads the final byte of data from the

MAX9672/MAX9673/MAX9674, followed by a STOP

condition.

Write Data Format

A write to the MAX9672/MAX9673/MAX9674 consists of

transmitting a START condition, the slave address with

the R/W bit set to 0, one data byte of data to configure

the internal register address pointer, one word (two

bytes) of data or more, and a STOP condition. Figure 4

illustrates the proper frame format for writing one word

of data to the MAX9672/MAX9673/MAX9674. Figure 5

illustrates the frame format for writing n-bytes of data to

the MAX9672/MAX9673/MAX9674.

The slave address with the R/W bit set to 0 indicates that

the master intends to write data to the MAX9672/

MAX9673/MAX9674. The MAX9672/MAX9673/MAX9674

acknowledge receipt of the address byte during the

master-generated ninth SCL pulse.

The second byte transmitted from the master config-

ures the MAX9672/MAX9673/MAX9674’s internal regis-

ter address pointer. The MAX9672/MAX9673/

MAX9674’s internal address pointer consists of the 6

LSBs of the second byte. The 2 MSBs of the second

byte (M1 and M0) are set to 00b when writing to the

internal registers. See the Memory section for more

details. The pointer tells the MAX9672/MAX9673/

MAX9674 where to write the next byte of data. An

acknowledge pulse is sent by the MAX9672/

MAX9673/MAX9674 upon receipt of the address point-

er data.

The third and fourth bytes sent to the MAX9672/

MAX9673/MAX9674 contain the data that is written to the

chosen register and which type of register it writes to,

volatile (DAC) or nonvolatile memory (MTP). See the

Registers section for more details. An acknowledge pulse

______________________________________________________________________________________ 11

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