CS7615-KQ データシートの表示（PDF） - Cirrus Logic

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CS7615-KQ

CCD Imager Analog Processor

Cirrus Logic 

Symbol

HBPD

Hlen

Hsynr

Hsynf

BC

Hend

Hstart

V1r

V1f

V2r

V2f

V3f

V3r

V4f

V4r

V2or

V2of

V3of

V3or

V2er

V2ef

V3ef

V3er

V4ef

V4er

VH1f

VH1r

VH3f

VH3r

OFDW

Description

Horizontal blanking period

Total number of horizontal pixels

HREF to HSYNC leading edge

HREF to HSYNC trailing edge

HREF to CLAMP leading edge

(clamp trailing edge at Hend)

HREF to HENB leading edge

Hz. clock disable period

V1 clock leading edge

V1 clock trailing edge

V2 clock leading edge

V2 clock trailing edge

V3 clock leading edge

V3 clock trailing edge

V4 clock leading edge

V4 clock trailing edge

V2odd clock leading edge

V2odd clock trailing edge

V3odd clock leading edge

V3odd clock trailing edge

V2even clock leading edge

V2even clock trailing edge

V3even clock leading edge

V3even clock trailing edge

V4even clock leading edge

V4even clock trailing edge

Charge read clock leading edge

Charge read clock trailing edge

Charge rd clock leading edge

Charge rd clock trailing edge

OFDW pulse width

Register

40h

41h, 42h

43h

44h

45h

46h

47h

48h

47h

4Ah

4Bh

4Ch

4Dh

4Eh

4Fh

50h, 52h

51h, 52h

53h, 55h

54h

56h, 58h

57h

59h, 5Bh

5Ah

5Ch, 5Eh

5Dh

5Fh, 61h

60h, 61h

62h, 64h

63h, 64h

65h

Table 2. Horizontal timing specifications

CS7615

14

DS231PP6

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