CS8904-CM5 データシートの表示（PDF） - Cirrus Logic

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CS8904-CM5

Crystal LAN™ Quad Ethernet Transceiver

Cirrus Logic 

CS8904

Crystal LAN™ Quad Ethernet Transceiver

Port Loopback causes the 10BASE-T transmitter to

be idled and the 10BASE-T receiver to be

disconnected. In addition, data received from the

controller on the TxDATA pin is looped back on

the RxDATA pin to the controller. Both CD and

RxCLOCK are provided to synchronize the

transfer to the controller. Note that since the port is

isolated from the external Ethernet network,

collisions will not occur.

4.4 External Clock Oscillator

A 20-MHz quartz crystal or CMOS clock input is

required by the CS8904. If a CMOS clock input is

used, it should be connected the to XTAL1 pin,

with the XTAL2 pin left open. The clock signal

should be 20 MHz ±0.01% with a duty cycle

between 45% and 55%. The specifications for the

crystal are described in the External Clock section

of the DC CHARACTERISTICS Table.

CIRRUS LOGIC ADVANCED PRODUCT DATABOOK

DS191PP2

19

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