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PSD813F1AV-12J データシートの表示(PDF) - STMicroelectronics

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PSD813F1AV-12J Datasheet PDF : 110 Pages
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PSD813F1V
Memory Operation
The main Flash and EEPROM memory are ad-
dressed through the microcontroller interface on
the PSD device. The microcontroller can access
these memories in one of two ways:
– The microcontroller can execute a typical bus
WRITE or READ operation just as it would if
accessing a RAM or ROM device using
standard bus cycles.
– The microcontroller can execute a specific
instruction that consists of several WRITE and
READ operations. This involves writing
specific data patterns to special addresses
within the Flash or EEPROM to invoke an
embedded algorithm. These instructions are
summarized in Table 8., page 20.
Typically, Flash memory can be read by the micro-
controller using READ operations, just as it would
read a ROM device. However, Flash memory can
only be erased and programmed with specific in-
structions. For example, the microcontroller can-
not write a single byte directly to Flash memory as
one would write a byte to RAM. To program a byte
into Flash memory, the microcontroller must exe-
cute a program instruction sequence, then test the
status of the programming event. This status test
is achieved by a READ operation or polling the
Ready/Busy pin (PC3).
The Flash memory can also be read by using spe-
cial instructions to retrieve particular Flash device
information (sector protect status and ID).
The EEPROM is a bit different. Data can be written
to EEPROM memory using write operations, like
writing to a RAM device, but the status of each
WRITE event must be checked by the microcon-
troller. A WRITE event can be one to 64 contigu-
ous bytes. The status test is very similar to that
used for Flash memory (READ operation or
Ready/Busy). Optionally, the EEPROM memory
may be put into a Software Data Protect (SDP)
mode where it requires instructions, rather than
operations, to alter its contents. SDP mode makes
writing to EEPROM much like writing to Flash
memory.
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