GS9021-CFU データシートの表示（PDF） - Unspecified

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GS9021-CFU

EDH Coprocessor

Unspecified 

Note that normally the device must first detect the incoming

standard in order for the proper blanking values to be

inserted. However, by setting BLANK_EN low, CLIP_TRS

high and forcing the standard in the HOST write table, the

GS9021 can be used to generate a blank, TRS formatted

video stream (with or without EDH), just by supplying a

clock to the device. The frequency of the clock being

supplied should be less than or equal to the standard

selected. The outgoing stream will just be a frequency

scaled version of that standard.

4.4 TRS Insertion

These three functions can also be turned on individually

through the HOSTIF as described above. THE CLIP_TRS

pin is logically ORed with each of the three bits from the

HOSTIF table. As a result, as long as the CLIP_TRS pin is

asserted, these functions cannot be turned off via the

HOSTIF.

4.6 Ancillary Header

PIN

LOGIC OPR

HOST BIT

ANC_HEADER

PIN

LOGIC OPR

HOST BIT

TRS_INSERT

TRS words, based on the internal flywheel, can be inserted

into the outgoing data stream by asserting HIGH the

TRS_INSERT bit of the HOSTIF write table. Note that for

proper TRS insertion, the incoming standard must be

detected and the flywheel synchronized. That is, the

GS9021 does NOT provide proper TRS insertion for

unformatted video data (video without TRS words).

In the case where the input signal disappears, TRSs will

continue to be inserted based on the last detected

standard. Further, if a TRS is already in the correct location,

it will be overwritten which may have the effect of correcting

the TRSID word.

TRS insertion will function incorrectly if the flywheel is

disabled. Thus if the flywheel is disabled the TRS_INSERT

function should be disabled as well.

4.5 Clipping And TRS Blanking/Insertion

PIN

CLIP_TRS

LOGIC OPR

OR

HOST BIT

601_CLIP

TRS_BLANK

TRS_INSERT

Asserting the CLIP_TRS pin HIGH turns on three features

described previously:

1. ITU-R-601 Clipping,

2. TRS Blanking, and

3. TRS Insertion

Updating of the ANC headers can occur to facilitate 8-bit to

10-bit conversion. If the ANC_HEADER bit of the HOSTIF

write table is set HIGH, all 3FC-3FF data values

corresponding to component ANC headers are remapped

to 3FF in the output data stream. For example, if 8 bit data

is input to the device, the ANC header of 00, FF, FF will

appear as 000, 3FC, 3FC and will be remapped to 000, 3FF,

3FF by the GS9021.

5. HOST INTERFACE TABLES

PIN

HOSTIF_MODE

LOGIC OPR

HOST BIT

The HOST INTERFACE TABLES (HOSTIF) refer to memory

locations within the GS9021 which store functional

information about the device. There are two tables, a write

table and read table.

The write table is organized into 15 word locations (each 8

bits wide) as shown in Table 3 and is used to set various

configuration/flag bits. The read table is organized into 23

word locations (each 8 bits wide) as shown in Table 4 and is

used to read status information from the device.

The HOSTIF tables can be accessed via an I²C (Inter-

Integrated Circuit) serial interface or an 8-bit parallel

interface. The HOSTIF_MODE pin selects which interface is

used. If the HOSTIF_MODE pin is HIGH, the HOSTIF

operates in I²C mode. If the HOSTIF_MODE pin is LOW, the

HOSTIF operates in parallel mode.

Note that many bits stored in the tables are also available

as device pins. Bits in the write table that have a default

value of 0, are logically ORed with the corresponding pin.

Write table control bits VBLANKS/L and BLANK_EN, which

have a default value of 1, are logically ANDed with the

corresponding pin.

If the HOST interface is not going to be used, the best way

to set the related pins is as follows:

HOSTIF_MODE = LOW

15

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