MAX6876 データシートの表示（PDF） - Maxim Integrated

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MAX6876

EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit

Maxim Integrated 

EEPROM-Programmable, Quad,

Power-Supply Tracker/Sequencer Circuit

Table 2. Configuring Tracking and Sequencing Modes

REGISTER

ADDRESS

0Bh

0Ch

EEPROM MEMORY

ADDRESS

2Bh

2Ch

BIT RANGE

[7:0]

[7:0]

Bit 7—If 1, OUT4 on ramp 2

Bit 6—If 1, OUT3 on ramp 2

Bit 5—If 1, OUT2 on ramp 2

Bit 4—If 1, OUT1 on ramp 2

Bit 3—If 1, OUT4 on ramp 1

Bit 2—If 1, OUT3 on ramp 1

Bit 1—If 1, OUT2 on ramp 1

Bit 0—If 1, OUT1 on ramp 1

Bit 7—If 1, OUT4 on ramp 4

Bit 6—If 1, OUT3 on ramp 4

Bit 5—If 1, OUT2 on ramp 4

Bit 4—If 1, OUT1 on ramp 4

Bit 3—If 1, OUT4 on ramp 3

Bit 2—If 1, OUT3 on ramp 3

Bit 1—If 1, OUT2 on ramp 3

Bit 0—If 1, OUT1 on ramp 3

DESCRIPTION

To speed up the discharge of the OUT_ voltage, an

optional 100Ω pulldown resistor can be selected (see

Table 3).

Slew-Rate Control

The reference ramp voltage slew rate during any con-

trolled power-up/down phase can be programmed in

the 100V/s to 800V/s range. Before any power-up or

retry cycle, the MAX6876 must first ensure that all

OUT_ voltages are near ground (below the VTH_PL

power low threshold). An internal programmable track-

ing timeout period can be selected to signal a fault and

shut down the output voltages if tracking takes too long

(see Table 4).

Power-supply tracking operation should be completed

within the selected fault timeout period. For selected

control ramps of 100V/s the normal tracking time

should be approximately 50ms (5V supply, SR =

100V/s). The total tracking time is extended when the

MAX6876 must vary the control slew rate to allow slow

supplies to catch up. If the external FET is too small

(RDS is too high for the selected load current and IN_

source current), the OUT_ voltage may never reach the

control ramp voltage.

Autoretry and Latch-Off Functions

The MAX6876 features latch-off or autoretry mode to

power on again after a fault condition has been detect-

ed. Toggle ENABLE, I2C command bit, and TRKEN or

cycle device power to clear the latch. Set bit 5 of regis-

ter 09h to “1” to program the MAX6876 in latch-off

mode, or “0” to program for autoretry mode. The

autoretry time can be programmed with bits 2, 3, and 4

of register 09h (see Table 5). During autoretry, the gate

drive remains off and FAULT remains asserted. In a

master-slave application, FAULT is asserted low until all

the OUT_ outputs of each device are discharged to

GND, and only the master counts the autoretry time

while HOLD remains low (see Table 5).

Stability Comment

No external compensation is required for tracking or

slew-rate control.

Powering the MAX6876

The MAX6876 derives power from VCC or the voltage-

detector inputs: IN1–IN4 (see the Functional Diagram).

VCC (if being used) or one of the IN_ inputs must be at

least +2.7V to ensure full device operation.

The highest input voltage on IN1–IN4 or VCC supplies

power to the device. Internal hysteresis ensures that

the supply input that initially powers the device contin-

ues to power the device when multiple input voltages

are within 50mV (typ) of each other.

______________________________________________________________________________________ 17

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