MAX6885 データシートの表示（PDF） - Maxim Integrated

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MAX6885

EEPROM-Programmable, Hex Power-Supply Supervisory Circuits

Maxim Integrated 

EEPROM-Programmable, Hex

Power-Supply Supervisory Circuits

Table 11. User EEPROM Write Disable Bits

REGISTER

ADDRESS

16h

EEPROM

MEMORY

ADDRESS

96h

BIT RANGE

DESCRIPTION

[1]

1 = User EEPROM Writes Disabled on RESET Assertion

0 = User EEPROM Writes Enabled on RESET Assertion

[0]

1 = User EEPROM Writes Disabled on UV/OV Assertion

0 = User EEPROM Writes Enabled on UV/OV Assertion

Configuration Register Bank

and EEPROM

The configuration registers can be directly modified by

the serial interface without modifying the EEPROM

after the power-up procedure terminates and the con-

figuration EEPROM data has been loaded into the con-

figuration register bank. Use the write byte or block

write protocols to write directly to the configuration reg-

isters. Changes to the configuration registers take

effect immediately and are lost upon power removal.

At device power-up, the register bank loads configura-

tion data from the EEPROM. Configuration data may

be directly altered in the register bank during applica-

tion development, allowing maximum flexibility.

Transfer the new configuration data, byte by byte, to

the configuration EEPROM with the write byte protocol.

The next device power-up or software reboot automati-

cally loads the new configuration. See Table 12 for a

complete register map.

Configuration EEPROM

The configuration EEPROM addresses range from 80h to

97h. Write data to the configuration EEPROM to set up

the MAX6884/MAX6885 automatically upon power-up.

Data transfers from the configuration EEPROM to the

configuration registers when VCC exceeds UVLO during

power-up or after a software reboot. After VCC exceeds

UVLO, an internal 1MHz clock starts after a 5µs delay,

and data transfer begins. Data transfer disables access

to the configuration registers and EEPROM. The data

transfer from EEPROM to configuration registers takes

2.5ms maximum. Read configuration EEPROM and con-

figuration register data any time after power-up or soft-

ware reboot. Write commands to the configuration

EEPROM and configuration registers are allowed at any

time after power-up or software reboot unless the config-

uration lock bit is set (see Table 10). When the configura-

tion lock bit is set, all write access to EEPROM and

registers is disabled with the exception of the configura-

tion lock bit itself. The maximum cycle time to write a sin-

gle byte in EEPROM is 11ms (max).

User EEPROM

The 512-bit user EEPROM addresses range from 40h to

7Fh (see Figure 11). Store revision data, board revision

data, or other data in these registers. The maximum

cycle time to write a single byte is 11ms (max). Disable

writes to the user EEPROM during RESET or UV/OV

assertion by programming bit R16h[1] or R16h[0],

respectively (see Table 11).

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