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30001(2010) データシートの表示(PDF) - ON Semiconductor

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30001 Datasheet PDF : 31 Pages
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NCL30001
PIN FUNCTION DESCRIPTION
Pin
Symbol
Description
1
CT
An external timing capacitor (CT) sets the oscillator frequency. A sawtooth between 0.2 V and 4 V sets the
oscillator frequency and the gain of the multiplier.
2
RAMP COMP A resistor (RRC) between this pin and ground adjust the amount of ramp compensation that is added to the
current signal. Ramp compensation is required to prevent subharmonic oscillations. This pin should not be
left open.
3
AC IN
The scaled version of the full wave rectified input ac wave is connected to this pin by means of a resistive
voltage divider. The line voltage information is used by the multiplier.
4
FB
An error signal from an external error amplifier circuit is fed to this pin via an optocoupler or other isolation
circuit. The FB voltage is a proportional of the load of the converter. If the voltage on the FB pin drops be-
low 0.41 V (typical) the controller enters SoftSkip to reduce acoustic noise.
5
VFF
Feedforward input. A scaled version of the filtered rectified line voltage is applied by means of a resistive
divider and an averaging capacitor. The information is used by the Reference Generator to regulate the
controller.
6
CM
Multiplier output. A capacitor is connected between this pin and ground to filter the modulated output of the
multiplier.
7
AC COMP
Sets the pole for the ac reference amplifier. The reference amplifier compares the low frequency compon-
ent of the input current to the ac reference signal. The response must be slow enough to filter out most of
the high frequency content of the current signal that is injected from the current sense amplifier, but fast
enough to cause minimal distortion to the line frequency information. The pin should not be left open.
8
Latch
LatchOff input. Pulling this pin below 1.0 V (typical) or pulling it above 7.0 V (typical) latches the controller.
This input can be used to implement an overvoltage detector, an overtemperature detector or both. Refer
to Figure 60 for a typical implementation.
9
TEST
This pin is a TEST pin. A nominal 50K $10% resistor must be connected to GND for proper operation.
10
IAVG
An external resistor and capacitor connected from this terminal to ground, to set and stabilizes the gain of
the current sense amplifier output that drives the ac error amplifier.
11
ISpos
Positive current sense input. Connects to the positive side of the current sense resistor.
12
VCC
Positive input supply. This pin connects to an external capacitor for energy storage. An internal current
source supplies current from the STARTUP pin VCC. Once the voltage on VCC reaches approximately 15.3
V, the current source turns off and the outputs are enabled. The drivers are disabled once VCC reaches
approximately 10.2 V. If VCC drops below 0.83 V (typical), the startup current is reduced to less than
500 mA.
13
DRV
Drive output for the main flyback power MOSFET or IGBT. DRV has a source resistance of 10.8 W (typical)
and a sink resistance of 8 W (typical).
14
NC
No Connect
15
GND
Ground reference for the circuit.
16
HV
Connect the rectified input line voltage directly to this pin to enable the internal startup regulator. A con-
stant current source supplies current from this pin to the capacitor connected to the VCC pin, eliminating
the need for a startup resistor. The charge current is typically 5.5 mA. Maximum input voltage is 500 V.
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