STR-A6300 データシートの表示（PDF） - Sanken Electric co.,ltd.

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STR-A6300

Hybrid IC with a built-in power MOSFET and a controller IC

Sanken Electric co.,ltd. 

STR-A6300 Application Notes

（Ver.1.2）

Added

追加

RA I1

P

D

③ VIN

Added(Vz=6追.8V加)

Vz=6.8V

コCンonトtrロol ーpaルrt 部

D⑦

⑧

①

S 680

OCP/FB ④ R4

C5

②⑤

GND

3

RB

I3

I2

追加

R5

Added

VIN(DC)MAX-VIN(DC)MIN

ＲＡ＝680×

０．７６

IDpeak(VinMIN)-IDpeak(VinMAX)

IDpeak(VinMIN)

RA×(6.8+0.76)

ＲＢ＝ VIN(DC)MIN-(6.8+0.76)

IDpeak(VinMAX)：

ID入P力ea電k(V圧inMMAAXX、) :最大負荷時Adのdeドd レイン電流

InIpDupteVaoklt(aVgeinMMAIXN,)D：rain current at MAX load

ID入P力ea電k(V圧inMMIINN、) : 最大負荷時のドレイン電流

IVnIpNut(VDoCl)taMgAeXM:I入N,力Dr電ain圧cu(rrMeAntXa)tのMA整X流loa後d 電圧

VIN(DC)MIN:入力電圧(MIN)の整流後電圧

VIN(DC) MAX : Input Volt.(MAX) after rectifying

VIN(DC) MIN : Input Volt.(MIN) after rectifying

図９ 入力電圧によるOCP補正回路

Fig.9 OCP compensation circuit with input voltage

7.4 Latch Circuit

Latch circuit keeps the oscillator output low and stops the power supply circuit operation when either the

Overvoltage Protection(OVP) or Thermal Shutdown(TSD) circuit operates.

The holding current of the latch circuit is 70uA MAX(Ta=25oC) when the Vin is 20V. However, considering

slight voltage increase at low temperature, it is required to flow 100uA or higher to the Vin terminal from the

start-up resistor in order to maintain the latch circuit operation.

In order to prevent malfunction caused by noises, etc., the delay time is set by a timer circuit incorporated in

the IC, and thereafter, the latch circuit starts its operation when either the OVP or TSD circuit operates for

8usec or longer.

The Vin terminal voltage, however, will drop even after the

ＶＩＮ

latch circuit starts its operation because the constant voltage

17.6V

（ＴＹＰ）

power supply(Reg.) circuit in the control circuitry continues its

operation and maintains higher circuit current.

10.1V

（ＴＹＰ）

When the Vin terminal voltage falls to the shutdown

voltage(7.9V MIN) or lower, the circuit current becomes below

70uA(Ta=25 oC), and the Vin terminal voltage starts rising

again.

When the Vin terminal voltage reaches the operation start

voltage(17.6V TYP), it falls as the circuit current increases again.

Consequently, the latch circuit operation prevents the Vin

時間

図10 ラッチ回路動作時Ｖ Ｉ端Ｎ子波形例

Time

Fig.10 Example of Vin waveform at

Latch Circuit ON

terminal voltage from rising abnormally by managing the voltage

between 10.1V(TYP) and 17.6V(TYP). The Fig.10 shows the voltage waveform when the latch circuit is in

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