AD9940 データシートの表示（PDF） - Analog Devices

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AD9940

High Speed, Correlated Double Sampler with Integrated Timing Driver

Analog Devices 

Data Sheet

CCD SIGNAL

4

5

1

RG

2

3

6

H1/H3

7

8

H2/H4

9

HL

10

11

PROGRAMMABLE CLOCK POSITIONS:

1RG POLARITY.

2RG RISING EDGE.

3RG FALLING EDGE.

4SHP SAMPLE LOCATION.

5SHD SAMPLE LOCATION.

6H1/H3 POLARITY.

7H1/H3 RISING EDGE POSITION.

8H1/H3 FALLING EDGE POSITION (H2/H4 ARE INVERSE OF H1/H3).

9HL POLARITY.

10HL RISING EDGE.

11HL FALLING EDGE.

Figure 9. High Speed Clock Programmable Locations

CCD

SIGNAL

N

N+1

N+2

N+9

SHPLOC

SHDLOC

DIFFP

DIFFN

ADCLK

(FOR AD9941)

tS1

VALID

t REC

Figure 10. SHP, SHD, and Data Output Timing

AD9940

N+10

Rev. A | Page 15 of 20

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