AD9940 データシートの表示（PDF） - Analog Devices

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AD9940

High Speed, Correlated Double Sampler with Integrated Timing Driver

Analog Devices 

AD9940

H-DRIVER AND RG OUTPUTS

In addition to the programmable timing positions, the AD9940

features on-chip output drivers for the RG and H1 to H4 out-

puts. These drivers are powerful enough to directly drive the

CCD inputs. The H-driver and RG driver current can be

adjusted for optimum rise/fall time into a particular load using

the H1/H3DRV, H2/H4DRV, RGDRV, and HLDRV registers

The horizontal output drive strength register is divided into

fifteen different 4-bit values, each one adjustable in 4.3 mA

increments. The minimum setting of 0 is off or three-state, and

the maximum setting of 15 is 64.5 mA.

Data Sheet

The RG and HL output drive strength registers are divided into

seven 3-bit values, each adjustable in 2.2 mA increments. The

minimum setting of 0 is equal to off or three-state, and the

maximum setting of 7 is 15.4 mA.

As shown in Figure 11, the H2/H4 outputs are inverses of

H1/H3. The internal propagation delay resulting from the

signal inversion is less than l ns, which is significantly less

than the typical rise time driving the CCD load. This results

in an H1/H2 crossover voltage at approximately 50% of the

output swing. The crossover voltage is not programmable.

Table 8. Timing Core Register Parameters for H1, H3, RG1, RG2, and SHP/SHD

Parameter

Length (Bits) Range

Description

Polarity

1

High/low

Polarity control for H1/H3, RG1, and RG2:

0 = no inversion.

1 = inversion.

Positive Edge

6

0 to 47 edge location

Positive edge location for H1/H3, RG1, and RG2.

Negative Edge

6

0 to 47 edge location

Negative edge location for H1/H3, RG1, and RG2.

Sample Location

6

0 to 47 sample location

Sampling location for SHP and SHD.

H-Drive Control

4

0 to 15 current steps

Drive current for H1 to H4, 0 to 15 steps of 4.3 mA each.

RG-Drive Control

3

0 to 7 current steps

Drive current for RG, 0 to 7 steps of 2.2 mA each.

HL-Drive Control

3

0 to 7 current steps

Drive current for HL, 0 to 7 steps of 2.2 mA each.

H1/H3

H2/H4

tRISE

tPD << tRISE

FIXED CROSSOVER VOLTAGE

tPD

H1/H3

Figure 11. H-Clock Inverse Phase Relationship

H2/H4

Table 9. Precision Timing Edge Locations

Quadrant

Edge Location (Decimal)

I

0 to 11

II

12 to 23

III

24 to 35

IV

36 to 47

Register Value (Decimal)

0 to 11

16 to 27

32 to 43

48 to 59

Register Value (Binary)

00 0000 to 00 1011

01 0000 to 01 1011

10 0000 to 10 1011

11 0000 to 11 1011

Rev. A | Page 16 of 20

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