AD9940 データシートの表示（PDF） - Analog Devices

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AD9940

High Speed, Correlated Double Sampler with Integrated Timing Driver

Analog Devices 

Data Sheet

HBLK SEQUENCES

The HBLK programmable timing shown in Figure 12 is

programmed using the HBLKTOG registers. Only the toggle

positions are used to designate the start and the stop posi-

tions of the blanking period. Additionally, a polarity control,

HBLKMASKPOL, designates the polarity of the horizontal

clock signals H1 to H4 during the blanking period. Setting

HBLKMASKPOL high sets H1 = H3 = high and

H2 = H4 = low during the blanking.

AD9940

Individual HBLK Sequences

Up to three individual HBLK sequences are available in each

line. This allows special H-blanking as shown in Figure 14. The

HBLK sequences are sequential starting with Sequence 0. To

ensure proper HBLK operation, the following sequence is

required for values programmed in the HBLKTOG registers:

HBLKTOG1_0 < HBLKTOG2_0 < HBLKTOG1_1 <

HBLKTOG2_1 < HBLKTOG1_2 < HBLKTOG2_2

CLI

PIXEL

CLOCK

HD

H1/H3

0

1

2

3

4

5

6

7

8

9

tCLIDLY

0

1

2

3

4

5

6

7

8

9

1

3

2

H2/H4

PROGRAMMABLE SETTINGS:

1HBLKTOG1_n (n = 0, 1, 2)

2HBLKMASKPOL

3HBLKTOG2_n (n = 0, 1, 2)

Figure 12. Horizontal Blanking Example Showing HBLKTOG1_0 = 0, HBLKMASKPOL = 0, and HBLKTOG2_0 = 3

HD

HBLK

H1/H3

...

H1/H3

H2/H4

...

NOTE

1. THE POLARITY OF H1 DURING THE BLANKING REGION IS PROGRAMMABLE (H2 HAS THE OPPOSITE POLARITY OF H1).

Figure 13. HBLK Masking Control

Rev. A | Page 17 of 20

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