MX25L6406E データシートの表示（PDF） - Macronix International
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MX25L6406E Datasheet PDF : 60 Pages
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MX25L6406E
Table 2. Protected Area Sizes
Status bit
Protect Level
BP3
BP2
BP1
BP0
64Mb
0
0
0
0 0 (none)
0
0
0
1 1 (2block, block 126th-127th)
0
0
1
0 2 (4blocks, block 124th-127th)
0
0
1
1 3 (8blocks, block 120th-127th)
0
1
0
0 4 (16blocks, block 112th-127th)
0
1
0
1 5 (32blocks, block 96th-127th)
0
1
1
0 6 (64blocks, block 64th-127th)
0
1
1
1 7 (128blocks, all)
1
0
0
0 8 (128blocks, all)
1
0
0
1 9 (64blocks, 0th-63th)
1
0
1
0 10 (96blocks, block 0th-95th)
1
0
1
1 11 (112blocks, block 0th-111th)
1
1
0
0 12 (120blocks, block 0th-119th)
1
1
0
1 13 (124blocks, block 0th-123th)
1
1
1
0 14 (126blocks, block 0th-125th)
1
1
1
1 15 (128blocks, all)
II. Additional 512 bit secured OTP for unique identifier: to provide 512 bit one-time program area for setting
device unique serial number - Which may be set by factory or system customer. Please refer to "Table 3. 512 bit
Secured OTP Definition".
- Security register bit 0 indicates whether the chip is locked by factory or not.
- To program the 512 bit secured OTP by entering 512 bit secured OTP mode (with ENSO command), and going
through normal program procedure, and then exiting 512 bit secured OTP mode by writing EXSO command.
- Customer may lock-down the customer lockable secured OTP by writing WRSCUR(write security register)
command to set customer lock-down bit1 as "1". Please refer to "Table 7. Security Register Definition" and "Ta-
ble 3. 512 bit Secured OTP Definition" for address range definition.
- Note: Once lock-down whatever by factory or customer, it cannot be changed any more. While in 512 bit se-
cured OTP mode, array access is not allowed.
Table 3. 512 bit Secured OTP Definition
Address range
Size
xxxx00~xxxx0F
128-bit
xxxx10~xxxx3F
384-bit
Standard Factory Lock
ESN (electrical serial number)
N/A
Customer Lock
Determined by customer
P/N: PM1577
REV. 1.8, NOV. 12, 2013
12
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