TH8060JDF データシートの表示（PDF） - Melexis Microelectronic Systems
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TH8060JDF Datasheet PDF : 16 Pages
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TH8060
LIN Bus Transceiver with integrated Voltage Regulator
Pin Description
VSUP 1
16 VCC
EN 2
15 SENSE
VTR 3
14 RESET
GND 4
13 GND
TH8060
GND 5
12 GND
BUS 6
11 TxD
SI 7
10 RxD
SO 8
9 n.c.
Pin
Name
I/O
Function
1
VSUP
Supply voltage
2
EN
I
Enable Input voltage regulator, HV-pull-down-Input, High-active
3
VTR
I
Analogue Input - definition of reset time und Reset voltage level
4
GND
Ground
5
GND
Ground
6
BUS
I/O
Bi-directional bus line
7
SI
I
Comparator Input, HV-Input
8
SO
O
5V-Comparator Output
9
n.c.
not connected
10
RxD
O
Receive Output, 5V-push-pull
11
TxD
I
5V-Transmit Input, pull-up-Input
12
GND
Ground
13
GND
Ground
14
RESET
O
5V-output reset, active low
15
SENSE
O
5V-output of VSUP-Monitoring
16
VCC
O
Regulator output 5V/100mA
Datasheet Rev 1.1 March 2001
Page 14
www.melexis.com
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