STK581U3C2D データシートの表示（PDF） - ON Semiconductor

部品番号

コンポーネント説明

メーカー

STK581U3C2D

Intelligent Power Module (IPM) 600 V, 30 A

ON Semiconductor 

Logic Timing Chart

HIN1,2,3

ON

OFF

LIN1,2,3

STK581U3C2D−E

VBS undervoltage protection reset signal

VDD

VDD undervoltage protection reset voltage

*2

VB1,2,3

*3VBS undervoltage protection reset voltage

*4

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−IS−D−−o−p−e−r−ation current level−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

−terminal

(BUS line)

Current

FAULT terminal

Voltage

(at pulled−up)

ON

*1

Upper

U, V, W

OFF

*1

Lower

U ,V, W

Automatically reset after protection

(18ms to 80ms)

Notes:

*1: Diagram shows the prevention of shoot−through via control logic. More dead time to account for switching delay needs to be added

externally.

*2: When VDD decreases all gate output signals will go low and cut off all of 6 IGBT outputs. When VDD rises the operation will resume

immediately.

*3: When the upper side gate voltage at VB1, VB2 and VB3 drops only, the corresponding upper side output is turned off. The outputs

return to normal operation immediately after the upper side gate voltage rises.

*4: In case of over current detection, all IGBT’s are turned off and the FAULT output is asserted. Normal operation resumes in 18 to

80 ms after the over current condition is removed.

Figure 8. Logic Timing Chart

www.onsemi.com

8

Share Link: