SI4362 データシートの表示（PDF） - Silicon Laboratories
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SI4362 Datasheet PDF : 47 Pages
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Si4362
3. Controller Interface
3.1. Serial Peripheral Interface (SPI)
The Si4362 communicates with the host MCU over a standard 4-wire serial peripheral interface (SPI): SCLK, SDI,
SDO, and nSEL. The SPI interface is designed to operate at a maximum of 10 MHz. The SPI timing parameters
are demonstrated in Table 9. The host MCU writes data over the SDI pin and can read data from the device on the
SDO output pin. Figure 2 demonstrates an SPI write command. The nSEL pin should go low to initiate the SPI
command. The first byte of SDI data will be one of the firmware commands followed by n bytes of parameter data
which will be variable depending on the specific command. The rising edges of SCLK should be aligned with the
center of the SDI data.
Table 9. Serial Interface Timing Parameters
Symbol
Parameter
Min (ns)
Diagram
tCH
Clock high time
tCL
Clock low time
tDS
Data setup time
tDH
Data hold time
tDD
Output data delay time
tEN
Output enable time
tDE
Output disable time
tSS
Select setup time
tSH
Select hold time
tSW
Select high period
40
40
20
SCLK
tSS
20
20
SDI
20
50
SDO
20
tEN
50
nSEL
80
tCL
tCH
tDS tDH
tDD
tSH tDE
tSW
nSEL
SDO
SDI
FW Command
Param Byte 0
Param Byte n
SCLK
Figure 2. SPI Write Command
The Si4362 contains an internal MCU that controls all the internal functions of the radio. For SPI read commands a
typical MCU flow of checking clear-to-send (CTS) is used to make sure the internal MCU has executed the
command and prepared the data to be output over the SDO pin. Figure 3 demonstrates the general flow of an SPI
read command. Once the CTS value reads FFh then the read data is ready to be clocked out to the host MCU. The
typical time for a valid FFh CTS reading is 20 µs. Figure 4 demonstrates the remaining read cycle after CTS is set
to FFh. The internal MCU will clock out the SDO data on the negative edge so the host MCU should process the
SDO data on the rising edge of SCLK.
Rev 0.4
13
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