PIC24HJ128GP202 データシートの表示（PDF） - Microchip Technology

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PIC24HJ128GP202

High-Performance, 16-bit Microcontrollers

Microchip Technology 

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04

TCxCON (Input Capture x Control) ........................... 170

TxCON (Type B Time Base Control) ........................ 166

TyCON (Type C Time Base Control) ........................ 167

UxMODE (UARTx Mode) .......................................... 190

UxSTA (UARTx Status and Control) ......................... 192

Reset

Illegal Opcode ....................................................... 59, 66

Trap Conflict.......................................................... 65, 66

Uninitialized W Register ........................................ 59, 66

Reset Sequence.................................................................. 67

Resets ................................................................................. 59

S

Serial Peripheral Interface (SPI) ....................................... 175

Software Reset Instruction (SWR) ...................................... 65

Software Simulator (MPLAB SIM)..................................... 281

Software Stack Pointer, Frame Pointer

CALLL Stack Frame.................................................... 47

Special Features of the CPU............................................. 261

SPI Module

SPI1 Register Map ...................................................... 35

Symbols Used in Opcode Descriptions............................. 272

System Control

Register Map......................................................... 45, 46

T

Temperature and Voltage Specifications

AC ..................................................................... 292, 326

Timer1 ............................................................................... 161

Timer2/3 ............................................................................ 163

Timing Characteristics

CLKO and I/O ........................................................... 295

Timing Diagrams

10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,

ASAM = 0, SSRC<2:0> = 000) ......................... 317

10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,

ASAM = 1, SSRC<2:0> = 111, SAMC<4:0> =

00001)............................................................... 317

12-bit A/D Conversion (ASAM = 0, SSRC<2:0> = 000) ..

315

Brown-out Situations ................................................... 65

ECAN I/O .................................................................. 311

External Clock ........................................................... 293

I2Cx Bus Data (Master Mode) .................................. 307

I2Cx Bus Data (Slave Mode) .................................... 309

I2Cx Bus Start/Stop Bits (Master Mode) ................... 307

I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 309

Input Capture (CAPx)................................................ 300

OC/PWM ................................................................... 301

Output Compare (OCx) ............................................. 300

Reset, Watchdog Timer, Oscillator Start-up Timer and

Power-up Timer ................................................ 296

SPIx Master Mode (CKE = 0).................................... 302

SPIx Master Mode (CKE = 1).................................... 303

SPIx Slave Mode (CKE = 0)...................................... 304

SPIx Slave Mode (CKE = 1)...................................... 305

Timer1, 2 and 3 External Clock................................. 298

Timing Requirements

ADC Conversion (10-bit mode) ................................. 331

ADC Conversion (12-bit Mode) ................................. 331

CLKO and I/O ........................................................... 295

External Clock ........................................................... 293

Input Capture ............................................................ 300

SPIx Master Mode (CKE = 0).................................... 327

SPIx Module Master Mode (CKE = 1)....................... 327

SPIx Module Slave Mode (CKE = 0)......................... 328

SPIx Module Slave Mode (CKE = 1)......................... 328

Timing Specifications

10-bit A/D Conversion Requirements ....................... 318

12-bit A/D Conversion Requirements ....................... 316

CAN I/O Requirements ............................................. 311

I2Cx Bus Data Requirements (Master Mode)........... 308

I2Cx Bus Data Requirements (Slave Mode)............. 310

Output Compare Requirements................................ 300

PLL Clock ......................................................... 294, 326

Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-

er-up Timer and Brown-out Reset Requirements...

297

Simple OC/PWM Mode Requirements ..................... 301

SPIx Master Mode (CKE = 0) Requirements............ 302

SPIx Master Mode (CKE = 1) Requirements............ 303

SPIx Slave Mode (CKE = 0) Requirements.............. 304

SPIx Slave Mode (CKE = 1) Requirements.............. 306

Timer1 External Clock Requirements ....................... 298

Timer2 External Clock Requirements ....................... 299

Timer3 External Clock Requirements ....................... 299

U

UART Module

UART1 Register Map............................................ 34, 35

Universal Asynchronous Receiver Transmitter (UART) ... 189

Using the RCON Status Bits............................................... 66

V

Voltage Regulator (On-Chip) ............................................ 265

W

Watchdog Time-out Reset (WDTR).................................... 65

Watchdog Timer (WDT)............................................ 261, 266

Programming Considerations ................................... 266

WWW Address ................................................................. 353

WWW, On-Line Support ..................................................... 10

DS70293D-page 352

Preliminary

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