DAC1005D650HW/C1 データシートの表示（PDF） - NXP Semiconductors.
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DAC1005D650HW/C1 Datasheet PDF : 42 Pages
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5. Block diagram
I0 to I9
18 to 25,
28, 29
10
dual port/
interleaved
data modes
Q0 to Q9
41, 42
45 to 48,
51 to 54
10
CLKP 8
CLKN 9
SDO
SCS_N
SDIO
SCLK
62 63 65 64
SPI
DAC1005D650
LATCH
I
FIR1
2×
FIR2
2×
FIR3
2×
LATCH
Q
FIR1
2×
FIR2
2×
FIR3
2×
CLOCK GENERATOR/
PLL
66
RESET_N
NCO
cos sin
mixer
+
−
mixer
A
x
sin x
mixer
+
+
B
x
sin x
mixer
COMPLEX MODULATOR
10-BIT
OFFSET
CONTROL
AUXILIARY
DAC
2
AUXAP
3
AUXAN
10-BIT
GAIN
CONTROL
DAC
+
90
IOUTAP
91
IOUTAN
OFFSET
CONTROL
68
REFERENCE
BANDGAP 69
VIRES
GAPOUT
+
86
IOUTBP
DAC
85
IOUTBN
10-BIT
GAIN
CONTROL
10-BIT
OFFSET
CONTROL
AUXILIARY
DAC
74
AUXBP
73
AUXBN
001aak158
Fig 1. Block diagram
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