BD82HM55QMNT データシートの表示（PDF） - Intel
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BD82HM55QMNT Datasheet PDF : 934 Pages
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15.2
15.3
15.1.17SID—Subsystem Identification Register (SATA–D31:F5) ............................ 631
15.1.18CAP—Capabilities Pointer Register (SATA–D31:F5).................................... 631
15.1.19INT_LN—Interrupt Line Register (SATA–D31:F5) ...................................... 631
15.1.20INT_PN—Interrupt Pin Register (SATA–D31:F5)........................................ 631
15.1.21IDE_TIM—IDE Timing Register (SATA–D31:F5) ........................................ 632
15.1.22PID—PCI Power Management Capability Identification
Register (SATA–D31:F5) ....................................................................... 632
15.1.23PC—PCI Power Management Capabilities Register
(SATA–D31:F5).................................................................................... 632
15.1.24PMCS—PCI Power Management Control and Status
Register (SATA–D31:F5) ....................................................................... 633
15.1.25MAP—Address Map Register (SATA–D31:F5) ............................................ 634
15.1.26PCS—Port Control and Status Register (SATA–D31:F5).............................. 635
15.1.27SATACR0— SATA Capability Register 0 (SATA–D31:F5) ............................. 636
15.1.28SATACR1— SATA Capability Register 1 (SATA–D31:F5) ............................. 636
15.1.29FLRCID— FLR Capability ID (SATA–D31:F5) ............................................. 636
15.1.30FLRCLV— FLR Capability Length and Value (SATA–D31:F5) ........................ 637
15.1.31FLRCTRL— FLR Control (SATA–D31:F5) ................................................... 637
15.1.32ATC—APM Trapping Control Register (SATA–D31:F5) ................................ 638
15.1.33ATC—APM Trapping Control (SATA–D31:F5) ............................................ 638
Bus Master IDE I/O Registers (D31:F5) .............................................................. 639
15.2.1 BMIC[P,S]—Bus Master IDE Command Register (D31:F5) .......................... 640
15.2.2 BMIS[P,S]—Bus Master IDE Status Register (D31:F5) ............................... 641
15.2.3 BMID[P,S]—Bus Master IDE Descriptor Table Pointer
Register (D31:F5) ................................................................................ 641
Serial ATA Index/Data Pair Superset Registers .................................................... 642
15.3.1 SINDX—SATA Index Register (D31:F5) ................................................... 642
15.3.2 SDATA—SATA Index Data Register (D31:F5)............................................ 642
15.3.2.1 PxSSTS—Serial ATA Status Register (D31:F5) ............................ 643
15.3.2.2 PxSCTL—Serial ATA Control Register (D31:F5)............................ 644
15.3.2.3 PxSERR—Serial ATA Error Register (D31:F5) .............................. 645
16 EHCI Controller Registers (D29:F0, D26:F0) .......................................................... 647
16.1 USB EHCI Configuration Registers
(USB EHCI—D29:F0, D26:F0) ........................................................................... 647
16.1.1 VID—Vendor Identification Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 648
16.1.2 DID—Device Identification Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 648
16.1.3 PCICMD—PCI Command Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 649
16.1.4 PCISTS—PCI Status Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 650
16.1.5 RID—Revision Identification Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 651
16.1.6 PI—Programming Interface Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 651
16.1.7 SCC—Sub Class Code Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 651
16.1.8 BCC—Base Class Code Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 651
16.1.9 PMLT—Primary Master Latency Timer Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 652
16.1.10HEADTYP—Header Type Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 652
16.1.11MEM_BASE—Memory Base Address Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 652
16.1.12SVID—USB EHCI Subsystem Vendor ID Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 653
16.1.13SID—USB EHCI Subsystem ID Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 653
16.1.14CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 653
16.1.15INT_LN—Interrupt Line Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 653
16.1.16INT_PN—Interrupt Pin Register
(USB EHCI—D29:F0, D26:F0) ................................................................ 654
Datasheet
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