LTC2262IUJ-12-PBF データシートの表示（PDF） - Linear Technology
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LTC2262IUJ-12-PBF Datasheet PDF : 28 Pages
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LTC2262-12
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
LVDS Output Mode
VDD
OVDD
IVDD
IOVDD
PDISS
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Digital Supply Current
(0VDD = 1.8V)
Power Dissipation
(Note 10)
(Note 10)
Sine Wave Input
Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
1.7
l
1.7
l
l
l
l
l
1.8
1.9
V
1.9
V
86.3
mA
18.8
mA
36.7
mA
189
mW
221
mW
All Output Modes
PSLEEP
PNAP
PDIFFCLK
Sleep Mode Power
Nap Mode Power
Power Increase with Differential Encode Mode Enabled
(No increase for Nap or Sleep Modes)
0.5
mW
9
mW
10
mW
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
fS
Sampling Frequency
tL
ENC Low Time (Note 8)
(Note 10)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
1
l
3.17
l
2.0
150
MHz
3.33
500
ns
3.33
500
ns
tH
ENC High Time (Note 8)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
3.17
l
2.0
3.33
500
ns
3.33
500
ns
tAP
Sample-and-Hold Acquisition Delay
Time
0
ns
SYMBOL PARAMETER
CONDITIONS
Digital Data Outputs (CMOS Modes: Full Data Rate and Double Data Rate)
tD
tC
tSKEW
ENC to Data Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Pipeline Latency
CL = 5pF (Note 8)
CL = 5pF (Note 8)
tD – tC (Note 8)
Full Data Rate Mode
Double Data Rate Mode
Digital Data Outputs (LVDS Mode)
tD
tC
tSKEW
ENC to Data Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
Pipeline Latency
CL = 5pF (Note 8)
CL = 5pF (Note 8)
tD – tC (Note 8)
MIN
l
1.1
l
1
l
0
l
1.1
l
1
l
0
TYP
MAX UNITS
1.7
3.1
ns
1.4
2.6
ns
0.3
0.6
ns
5.0
Cycles
5.5
Cycles
1.8
3.2
ns
1.5
2.7
ns
0.3
0.6
ns
5.5
Cycles
226212p
6
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