DSPIC33FJ32GP202-E/SO データシートの表示（PDF） - Microchip Technology
部品番号
コンポーネント説明
メーカー
DSPIC33FJ32GP202-E/SO Datasheet PDF : 402 Pages
| |||
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
FIGURE 1-1:
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/
X04 BLOCK DIAGRAM
PSV and Table
Data Access
Control Block
Interrupt
Controller
23
23
23
8
16
PCU PCH PCL
Program Counter
Stack
Control
Logic
Loop
Control
Logic
Y Data Bus
X Data Bus
16
16
Data Latch
16
Data Latch
X RAM
Address
Latch
Y RAM
Address
Latch
16
16
DMA
RAM
PORTA
PORTB
DMA
Controller
16
PORTC
Address Latch
Address Generator Units
Program Memory
Data Latch
24
ROM Latch
EA MUX
16 16
Remappable
Pins
Instruction
Decode and
Control
Control Signals
to Various Blocks
OSC2/CLKO Timing
OSC1/CLKI Generation
FRC/LPRC
Oscillators
Precision
Band Gap
Reference
Voltage
Regulator
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Instruction Reg
16
DSP Engine
Divide Support
16 x 16
W Register Array
16
16-bit ALU
16
VCAP/VDDCORE
VDD, VSS
MCLR
PMP/
EPSP
Comparator ECAN1
2 Ch.
Timers
1-5
UART1, 2
ADC1
OC/
PWM1-4
RTCC
DAC1
SPI1, 2 IC1, 2, 7, 8
CNx
I2C1
DCI
Note:
Not all pins or features are implemented on all device pinout configurations. See pinout diagrams for the specific pins and features pres-
ent on each device.
DS70292D-page 16
Preliminary
2009 Microchip Technology Inc.
Share Link: 