UPD720112 データシートの表示（PDF） - NEC => Renesas Technology
部品番号
コンポーネント説明
メーカー
UPD720112 Datasheet PDF : 32 Pages
| |||
µPD720112
External Serial ROM Timing
Parameter
Clock frequency
Clock pulse width low
Clock pulse width high
Clock low to data out valid
Time the bus must be free before a new
transmission can start
Start hold time
Start setup time
Data in hold time
Data in setup time
Stop setup time
Data out hold time
Write cycle time
Symbol
fSCL
tLOW
tHIGH
tAA
tBUF
tHD.STA
tSU.STA
tHD.DTA
tSU.DTA
tSU.STO
tDH
tWR
Condition
MIN.
TYP.
MAX.
Unit
94.6
100
kHz
4700
ns
4000
ns
100
3500
ns
4700
ns
4000
4700
0
250
4700
300
ns
ns
ns
ns
ns
ns
15
ms
Figure 2-9. External Serial ROM Bus Timing
SCL
tSU.STA
SDA
(Output)
SDA
(Input)
tLOW
tHD.STA
tHIGH
tLOW
tHD.DAT
tSU.DAT
tAA
tDH
tSU.STO
tBUF
Figure 2-10. External Serial ROM Write Cycle Timing
SCL
SDA
8th bit
Word n
ACK
Stop
condition
tWR
Start
condition
18
Data Sheet S16616EJ2V0DS
Share Link: 