DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MC80C0208K データシートの表示(PDF) - MagnaChip Semiconductor

部品番号
コンポーネント説明
メーカー
MC80C0208K Datasheet PDF : 128 Pages
First Prev 111 112 113 114 115 116 117 118 119 120 Next Last
Preliminary
MC80F0208/16/24
25. FLASH PROGRAMMING
The Device Configuration Area can be programmed or left un-
programmed to select device configuration such as security bit.
This area is not accessible during normal execution but is read-
able and writable during FLASH program / verify mode. The De-
vice Configuration Area register is located at the address 20FFH.
76
5
4
3
2
1
0
CONFIG
-
-
-
-
- PFS1 PFS0 LOCK
ADDRESS: 20FFH
INITIAL VALUE: 00H
Code Protect (Available FLASH version)
0 : Lock Disable
1 : Lock Enable (main cell read protection)
PFD Level Selection
00: PFD = 2.7V
01: PFD = 2.7V
10: PFD = 3.0V
11: PFD = 2.4V
Figure 25-1 Device Configuration Area
25.1 Lock bit
The lock bit exists in Device Configuration Area register. If lock
bit is programmed and user tries to read FLASH memory cell, the
output data from the data port is 5AH that means the normal pro-
tection operation of user program data.Once the lock bit is pro-
grammed, the user can't modify and read the data of user program
area.
25.2 Power Fail Detector
The power fail detection provides 3 level of detection, 2.4V, 2.7V
and 3.0V. The default level of detection is 2.7V and this level is
applied if user does not select the specific level in FLASH pro-
gramming S/W tools. For more information, Refer to “24. POW-
ER FAIL PROCESSOR” on page 105.
MAR. 2005 Ver 0.2
107

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]