ML9041 データシートの表示（PDF） - Oki Electric Industry

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ML9041

DOT MATRIX LCD CONTROLLER DRIVER

Oki Electric Industry 

¡ Semiconductor

ML9041

FUNCTIONAL DESCRIPTION

Instruction Register (IR), Data Register (DR), and Expansion Instruction Register (ER)

These registers are selected by setting the level of the Register Selection input pins RS0 and RS1.

The DR is selected when both RS0 and RS1 are “H”. The IR is selected when RS0 is “L” and RS1

is “H”. The ER is selected when both RS0 and RS1 are “L”. (When RS0 is “H” and RS1 is “L”, the

ML9041 is not selected.)

The IR stores an instruction code and the address code of the display data RAM (DDRAM) or the

character generator RAM (CGRAM).

The microcontroller (CPU) can write to the IR but cannot read from the IR.

The ER stores a contrast adjusting code and the address code of the arbitrator RAM (ABRAM).

The CPU can write to or read from the ER.

The DR stores data to be written in the DDRAM, ABRAM and CGRAM and also stores data read

from the DDRAM, AMRAM and CGRAM.

The data written in the DR by the CPU is automatically written in the DDRAM, ABRAM or

CGRAM.

When an address code is written in the IR or ER, the data of the specified address is automatically

transferred from the DDRAM, ABRAM or CGRAM to the DR. The data of the DDRAM, ABRAM

and CGRAM can be checked by allowing the CPU to read the data stored in the DR.

After the CPU writes data in the DR, the data of the next address in the DDRAM, ABRAM or

CGRAM is selected to be ready for the next writing by the CPU. Similarly, after the CPU reads

the data in the DR, the data of the next address in the DDRAM, ABRAM or CGRAM is set in the

DR to be ready for the next reading by the CPU.

Writing in or reading from these 3 registers is controlled by changing the status of the R/

W(Read/Write) pin.

Table 1 R/W pin status and register operation

R/W RS0 RS1

Operation

L

L

H Writing in the IR

H

L

H Reading the Busy flag (BF) and the address counter (ADC)

L

H

H Writing in the DR

H

H

H Reading from the DR

L

L

L Writing in the ER

H

L

L Reading the contrast code

Busy Flag (BF)

The status “1” of the Busy Flag (BF) indicates that the ML9041 is carrying out internal operation.

When the BF is “1”, any new instruction is ignored.

When R/W = “H”, RS0 = “L” and RS1 = “H”, the data in the BF is output to the DB7.

New instructions should be input when the BF is “0”.

When the BF is “1”, the output code of the address counter (ADC) is undefined.

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