CYUSB3302 データシートの表示（PDF） - Cypress Semiconductor

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CYUSB3302

HX3 USB 3.0 Hub

Cypress Semiconductor 

CYUSB330x

CYUSB331x

CYUSB332x

System Interfaces

Upstream Port (US)

This port is compliant with the USB 3.0 specification and includes

an integrated 1.5 k pull-up and termination resistors. It also

supports ACA-Dock to enable charging an OTG host connected

on the US port.

Downstream Ports (DS1, 2, 3, 4)

DS ports are compliant with the USB 3.0 specification and

integrate 15 k pull-down and termination resistors. Ports can

be disabled or enabled, and can be set to removable or

non-removable options. BC v1.2 charging is enabled by default

and can be disabled on each DS port using the configuration

options (see Configuration Options).

Communication Interfaces (I2C)

The interface follows the Inter-IC Bus specification, version 3.0,

with support for the standard mode (100 kHz) and the fast mode

(400 kHz) frequencies. HX3 supports I2C in the slave and master

modes. The I2C interface supports the multi-master mode of

operation. Both the SCL and SDA signals require external

pull-up resistors based on the specification. VDD_IO for HX3 is

3.3 V and it is expected that the I2C pull-up resistors will be

connected to the same supply.

Oscillator

HX3 requires an external crystal with a frequency of 26 MHz and

an accuracy of ±150 ppm in parallel resonant, fundamental

mode. The crystal drive circuit is capable of a low-power drive

level (<200 µW). The crystal connection to the XTL_OUT and

XTL_IN pins is shown in Figure 10.

Figure 10. Crystal Connection

26 MHz

XTL_IN

XTL_OUT

10 pF

10 pF

GPIOs

HX3 GPIOs are used for overcurrent sensing, controlling

external power switches, and driving LEDs. These pins can sink

up to 4 mA current each. GPIOs also enable pin-straps for input

configuration. Refer to Table 5 for more details.

Power Control

The PWR_EN[1-4] and OV_CURR[1-4] pins interface HX3 to

external power switches. These pins are used to control power

switches for DS port power and monitor overcurrent conditions.

The power switch polarity and the power control mode (individual

and ganged) can be changed using the configuration options.

Reset

HX3 operates with two external power supplies, 3.3 V and 1.2 V.

There is no power sequencing requirement between these two

supplies. However, the RESETN pin should be held LOW until

both these supplies become stable.

The RESETN pin can be tied to VDD_IO through an external

resistor and to ground (GND) through an external capacitor

(minimum 5 ms time constant), as shown in Figure 11. This

creates a clean reset signal for power-on reset (POR).

HX3 does not support internal brown-out detection. If the system

requires this feature, an external reset should be provided on the

RESETN pin when supplies are below their valid operating

ranges.

Figure 11. Reset Connection

VDD_IO

10 k

1.5 µF

RESETN

Configuration Mode Select

Configuration options are selected through the MODE_SEL pins

and the pin-strap enable pin (PIN_STRAP). After power-up,

these pins are sampled by an on-chip bootloader to determine

the configuration options (see Table 4).

Table 4. HX3 Boot Sequence

MODE MODE

SEL[1] SEL[0]

HX3 Configuration Modes

0

0 Reserved. Do not use this mode.

1

1 Internal ROM configuration (See Errata

on page 30)

0

1

I2C Master, read configuration from I2C

EEPROM*

1

0

I2C Slave, configure from an external I2C

Master*

* Download Cypress-provided firmware from www.cypress.com/hx3.

Configuration Options

HX3 can be configured by using one of the following:

■ eFuse (one-time programmable memory)

■ Pin-Strap (read configuration from dedicated pins at power on)

■ External I2C slave such as an EEPROM

■ External I2C master

The I2C master/slave configuration overrides the pin-strap

configuration. Pin-straps override the eFuse configuration, and

the eFuse configuration overrides the internal ROM

configuration.

eFuse Configuration

HX3 contains eFuses, which are OTP elements on the chip that

can be electrically blown. The eFuses are read by the bootloader

to determine the customer-specific configurations. eFuse

programming is supported only at factory and distributor

locations where programming conditions can be controlled.

Document Number: 001-73643 Rev. *G

Page 17 of 33

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