MPC8250AZUPIBC データシートの表示（PDF） - Freescale Semiconductor

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MPC8250AZUPIBC

MPC8250 Hardware Specifications

Freescale Semiconductor 

Electrical and Thermal Characteristics

Figure 8 shows PIO, timer, and DMA signals.

Sys clk

PIO/IDMA/TIMER[TGATE assertion] input signals

(See note)

sp22

TIMER input signal [TGATE deassertion]

(See note)

sp23

sp22

sp42/sp43

sp23

IDMA output signals

sp42/sp43

sp42a/sp43a

TIMER(sp42/43)/ PIO(sp42a/sp43a)

output signals

Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.

Figure 8. PIO, Timer, and DMA Signal Diagram

Table 9 lists SIU input characteristics.

Table 9. AC Characteristics for SIU Inputs 1

Spec Number

Max

Min

Characteristic

Setup (ns)

Hold (ns)

66 MHz 83 MHz 66 MHz 83 MHz

sp11

sp10 AACK/ARTRY/TA/TS/TEA/DBG/BG/BR

6

5

0.5

0.5

sp12

sp10 Data bus in normal mode

5

4

0.5

0.5

sp13

sp10 Data bus in ECC and PARITY modes

8

6

0.5

0.5

sp14

sp10 DP pins

7

6

0.5

0.5

sp15

sp10 All other pins

5

4

0.5

0.5

1 Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN.

Timings are measured at the pin.

MPC8250 Hardware Specifications, Rev. 2

16

Freescale Semiconductor

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