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ATTINY24A_10 データシートの表示(PDF) - Atmel Corporation

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ATTINY24A_10 Datasheet PDF : 22 Pages
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ATtiny24A/44A
9. Datasheet Revision History
9.1 Rev. 8183B – 03/10
1. Updated template.
2. Added UFBGA package (15CC1) in: “Features” on page 1, “Pin Configurations” on
page 2, Section 6. “Ordering Information” on page 11, and Section 7.3 “15CC1” on
page 15.
3. Separated typical characteristic plots, added Section 21.2 “ATtiny24A” on page 183.
4. Updated sections:
Section 14.5.4 “USIBR – USI Buffer Register” on page 127, header updated
Section 6. “Ordering Information” on page 11, added tape & reel and topside
marking, updated notes
5. Updated Figures:
Figure 4-1 “Block Diagram of the AVR Architecture” on page 7
Figure 8-1 “Reset Logic” on page 37
Figure 14-1 “Universal Serial Interface, Block Diagram” on page 116, USIDB ->
USIBR
Figure 19-5 “High-voltage Serial Programming Waveforms” on page 169
6. Updated Tables:
Table 19-11, “Minimum Wait Delay Before Writing the Next Flash or EEPROM
Location,” on page 164, updated value for tWD_ERASE
9.2 Rev. 8183A – 12/08
1. Initial revision. Created from document 8006H.
2. Updated "Ordering Information" on page 18 and page 18. Pb-plated packages are no
longer offered and there are no separate ordering codes for commercial operation
range, the only available option now is industrial. Also, updated some order codes to
reflect changes in leadframe composition and added VQFN package option.
3. Updated data sheet template.
4. Removed all references to 8K device.
5. Updated characteristic plots of section “Typical Characteristics”, starting on page 182.
6. Added characteristic plots:
“Internal Bandgap Voltage vs. Supply Voltage” on page 233
“Internal Bandgap Voltage vs. Temperature” on page 233
7. Updated sections:
“Features” on page 1
“Power Reduction Register” on page 34
“Analog Comparator” on page 128
“Features” on page 132
“Operation” on page 133
“Starting a Conversion” on page 134
“ADC Voltage Reference” on page 139
19
8183BS–AVR–03/10

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