TDA7719TR データシートの表示（PDF） - STMicroelectronics
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TDA7719TR Datasheet PDF : 46 Pages
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TDA7719
4
Description
Description
4.1
Input configuration
4.1.1
Note:
Front and rear selector
The input stage (Main source and 2nd source) is configurable to adapt to different
application. There are 7 different configurations which provide different input structure and
different number of input sources as shown below.
● 4 x QD,
● 2 x QD + 3 x SE,
● 1 x QD + 5 x SE,
● 1 x QD + 3 x SE + 2 x MD,
● 3 x QD + 1 x FD,
● 3 x QD + 2 x SE,
● 1 x QD + 2 x SE + 1 x FD + 1 x MD,
● 1 x QD + 3 x SE + 1 x FD
QD = Quasi-Differential, SE = Single-ended input, FD = Full Differential, MD = mono
Differential
The configuration of the input stage is controlled by ‘Input Configuration’ bits in I2C control
table (Byte0 Bit5~Bit7). The table below shows the configuration of input pins in different
configurations.
Table 6. Input pin configuration
Configuration bits (Byte0 Bit7~Bit5)
Pin Pin name "000"
"001"
"010"
"011"
"100"
"101"
"110"
"111"
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
1
QD1L_SE1L
_MD3+
2
QD1R_SE1R
_MD3-
3 QD1G_SE2L
4 QD2G_SE2R
QD1L
SE1L
SE1L
SE1L
QD1L
QD1L
MD3+
SE1L
IN0
IN0
IN0
IN7
IN0
QD1R IN0 SE1R
SE1R
SE1R
QD1R IN0 QD1R IN0 MD3-
SE1R
QD1G
QD2G
SE2L
SE2L
SE2L
QD1G
IN4
IN4
IN4
SE2R
SE2R
SE2R
QD2G
QD1G
QD2G
SE2L
SE2L
IN4
IN4
SE2R
SE2R
5 QD2L_SE3L
6 QD2R_SE3R
QD2L IN1 SE3L
SE3L
SE3L
QD2L IN1 QD2L IN1 SE3L
SE3L
IN1
IN1
IN1
IN1
IN1
QD2R
SE3R
SE3R
SE3R
QD2R
QD2R
SE3R
SE3R
7 QD3L
8 QD3G
9 QD3R
QD3L
QD3L
QD3L
QD3L
QD3L
QD3L
QD3L
QD3L
QD3G IN2 QD3G IN2 QD3G IN2 QD3G IN2 QD3G IN2 QD3G IN2 QD3G IN2 QD3G IN2
QD3R
QD3R
QD3R
QD3R
QD3R
QD3R
QD3R
QD3R
10
QD4L_FD4+
_SE4L_MD1+
QD4L
QD4L
SE4L
MD1+
FD4L+
SE4L
FD4L+
FD4L+
IN5
IN3
IN5
11
QD4G_FD4L
_SE4R_MD1-
QD4G
QD4G
SE4R
MD1-
FD4L-
SE4R
FD4L-
FD4L-
IN3
IN3
IN3
IN3
IN3
12
QD4G_FD4R_S
E5L_MD2-
QD4G
QD4G
SE5L
MD2-
FD4R-
SE5L
FD4R-
FD4R-
IN6
IN3
IN6
13
QD4R_FD4R+_
SE5R_MD2+
QD4R
QD4R
SE5R
MD2+
FD4R
+
SE5R
FD4R+
FD4R+
Doc ID 13698 Rev 5
13/46
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