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MC68HC908LB8_05 データシートの表示(PDF) - Freescale Semiconductor

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MC68HC908LB8_05
Freescale
Freescale Semiconductor Freescale
MC68HC908LB8_05 Datasheet PDF : 36 Pages
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Routines Supported in ROM
FLASH Overview
The FLASH cell used on these 0.5-µ MCUs is an industry-proven split-gate cell. The cell uses channel
hot electron injection for programming and Fowler-Nordheim tunnelling for erasing. All programming
voltages are generated internally by a charge pump from a single connection to VDD.
With the quick byte-programming time and the organization of the FLASH array into 32-byte rows, the
entire 8-Kbyte memory can be programmed in less than one-half second. This type of FLASH is specified
to withstand at least 10,000 program/erase cycles and has enhanced reliability over previous technology.
Usually, split-gate FLASH is programmed on a row basis and erased on a page basis. Also, an entire
specified array can be mass erased. For the target MCUs, rows are 32 bytes and pages are 64 bytes (two
rows of 32 bytes each).
Routines Supported in ROM
In the ROM, six routines are supported. Because the ROM has a jump table, the user does not call the
routines with direct addresses. Therefore, the calling addresses will not change—even when the ROM
code is updated in the future.
This section introduces each routine briefly. Details are discussed in later sections.
GetByte
This routine is used to receive a byte serially on the general-purpose I/O PTA0. The receiving baud rate
is the same as the baud rate used in monitor mode. In the GetByte routine, the GetBit routine is called to
generate baud rates required for each MCU.
PutByte
This routine is used to send a byte serially on the general-purpose I/O PTA0. The sending baud rate is
the same as the baud rate specified in monitor mode.
RDVRRNG
This routine is used to perform one of two options. Using the send-out option, this routine reads FLASH
locations and sends the data out serially on the general-purpose I/O PTA0. Using to verify option, this
routine verifies the FLASH data against data in a specific RAM location, which is referred to as a DATA
array.
PRGRNGE
This routine is used to program a contiguous range of FLASH locations that is up to 32 bytes and in the
same row. Programming data is first loaded into the DATA array. PRGRNGE can be used when the
internal operating frequency (fop) is between 1.0 MHz and 8.4 MHz.
On-Chip FLASH Programming Routines, Rev. 4
2
Freescale Semiconductor

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