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ISL9003AIEMZ-T データシートの表示(PDF) - Renesas Electronics

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ISL9003AIEMZ-T
Renesas
Renesas Electronics Renesas
ISL9003AIEMZ-T Datasheet PDF : 12 Pages
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ISL9003A
Pin Description
5 LD SC-70 6 LD µTDFN
PIN
PIN
NUMBER NUMBER PIN NAME
DESCRIPTION
1
6
VIN
Supply Voltage/LDO Input. Connect a 1µF capacitor to GND.
2
2
GND GND is the connection to system ground. Connect to PCB Ground plane.
3
4
EN
Output Enable. When this signal goes high, the LDO is turned on.
4
3
CBYP Reference Bypass Capacitor Pin. Optionally connect capacitor of value 0.01µF to 1µF between this pin
and GND to tune in the desired noise and PSRR performance.
5
1
VO
LDO Output. Connect a 1µF capacitor of value to GND.
-
5
NC
No Connect.
Typical Application
VIN (2.3V TO 5V)
ON
ENABLE
OFF
C1
ISL9003A (SC-70)
1
VIN
2
GND
5
VO
3
EN
4
CBYP
C3
C2
VOUT
C1, C2: 1µF X5R CERAMIC CAPACITOR
C3: 0.1µF X5R CERAMIC CAPACITOR
VOUT
ISL9003A (µTDFN)
1
VO
6
VIN
2 GND
NC 5
3 CBYP
4
EN
C2
C3
VIN (2.3V TO 5V)
ON
ENABLE
OFF
C1
C1, C2: 1µF X5R CERAMIC CAPACITOR
C3: 0.1µF X5R CERAMIC CAPACITOR
FN6299 Rev 5.00
July 18, 2014
Page 8 of 12

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