X28VC256 データシートの表示（PDF） - Xicor -> Intersil

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X28VC256

5 Volt, Byte Alterable E2PROM

Xicor -> Intersil 

X28VC256

DATA Polling Timing Diagram(10)

ADDRESS

AN

AN

AN

CE

WE

tOEH

OE

I/O7

DIN=X

Toggle Bit Timing Diagram(10)

DOUT=X

tWC

tOES

tDW

DOUT=X

3869 FHD F09

CE

WE

tOEH

OE

HIGH Z

I/O6

*

*

tWC

* I/O6 beginning and ending state will vary, depending upon actual tWC

Note: (10) Polling operations are by definition read cycles and are therefore subject to read cycle timings.

tOES

tDW

3869 FHD F10

15

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