LC74761(1996) データシートの表示（PDF） - SANYO -> Panasonic
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LC74761 Datasheet PDF : 20 Pages
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LC74761, 74761M
Second byte
DA0 to DA7 Register name
State
Register content
Function
7
—
0
Second byte identification bit
6
—
0
5
—
0
4
—
0
3
MOD3
SEL
0
Normal MOD3 (P14) output (PS1 = 1)
1
Specifies MOD3 general port output
2
MOD2
SEL
0
Normal MOD2 (P13) output (PS1 = 1)
1
Specifies MOD2 general port output
1
MOD1
SEL
0
Normal MOD1 (P12) output (PS1 =1)
1
Specifies MOD1 general port output
0
MOD0
SEL
0
Normal MOD0 (P11) output (PS1 = 1)
1
Specifies MOD0 general port output
Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0.
11 COMMAND73: Display Control Setting Command 7
First byte
DA0 to DA7
7
6
5
4
3
2
1
0
Register name
—
—
—
—
—
—
—
LINS
State
1
1
1
1
1
1
0
0
1
Register content
Function
The command 7 identification code: sets display
control parameters
Expansion command 3 identification code
Selects lower 6 bits (0 to 5).
Selects upper 6 bits (6 to B).
Second byte
DA0 to DA7 Register name
State
Register content
Function
7
—
0
Second byte identification bit
6
—
0
5
—
0
4
—
0
3
VCP
SELECT2
0
No feedback resistance
1
Feedback resistance
2
SDETOUT
SEL
0
Normal SOUT (P29) output (PS2 = 1)
1
Specifies SOUT general port output
1
VOUT
SEL
0
Normal VOUT (P7) output (PS2 =1)
1
Specifies VOUT general port output
0
HOUT
SEL
0
Normal HOUT (P4) output (PS2 = 1)
1
Specifies HOUT general port output
Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0.
Note
Specifies port output data
when PS1 = 0.
Specifies port output data
when PS1 = 0.
Specifies port output data
when PS1 = 0.
Specifies port output data
when PS1 = 0.
Note
Selects lower or upper 6 bits for half
tone output line setting.
Note
Specifies VCO oscillator feedback
resistance connection
Specifies port output data
when PS2 = 0.
Specifies port output data
when PS2 = 0.
Specifies port output data
when PS2 = 0.
No. 4846-14/20
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